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llvm-mirror/docs/AMDGPU/gfx8_label.rst
Dmitry Preobrazhensky 50947152c2 [AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description.
Summary of changes:
- added description of MTBUF instructions and format modifier;
- described limitations of f16 inline constants when used with integer operands;
- updated description of gfx9+ flat global addressing modes;
- v_accvgpr_write_b32 src0 corrections (gfx908);
- minor bugfixing and improvements.
2020-08-21 14:25:14 +03:00

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..
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* *
* Automatically generated file, do not edit! *
* *
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.. _amdgpu_synid8_label:
label
===========================
A branch target which is a 16-bit signed integer treated as a PC-relative dword offset.
This operand may be specified as one of the following:
* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range -32768..65535.
* A :ref:`symbol<amdgpu_synid_symbol>` (for example, a label) representing a relocatable address in the same compilation unit where it is referred from. The value is handled as a 16-bit PC-relative dword offset to be resolved by a linker.
Examples:
.. parsed-literal::
offset = 30
label_1:
label_2 = . + 4
s_branch 32
s_branch offset + 2
s_branch label_1
s_branch label_2
s_branch label_3
s_branch label_4
label_3 = label_2 + 4
label_4: