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557ccbef5f
Other objects can never reference the MergedGlobals symbol so external linkage is never needed. Using private instead of internal linkage means the object is more similar to what it looks like when global merging is not enabled, with the only difference being that the merged variables are addressed indirectly relative to the start of the section they are in. Also add aliases for merged variables with internal linkage, as this also makes the object be more like what it is when they are not merged. Differential Revision: http://reviews.llvm.org/D11942 llvm-svn: 244615
64 lines
1.7 KiB
LLVM
64 lines
1.7 KiB
LLVM
; RUN: llc -mtriple=aarch64-apple-ios -asm-verbose=false -aarch64-collect-loh=false \
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; RUN: -aarch64-global-merge -global-merge-group-by-use -global-merge-ignore-single-use \
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; RUN: %s -o - | FileCheck %s
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; We assume that globals of the same size aren't reordered inside a set.
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@m1 = internal global i32 0, align 4
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@n1 = internal global i32 0, align 4
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@o1 = internal global i32 0, align 4
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; CHECK-LABEL: f1:
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define void @f1(i32 %a1, i32 %a2) #0 {
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; CHECK-NEXT: adrp x8, [[SET:l__MergedGlobals]]@PAGE
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; CHECK-NEXT: add x8, x8, [[SET]]@PAGEOFF
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; CHECK-NEXT: stp w0, w1, [x8]
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; CHECK-NEXT: ret
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store i32 %a1, i32* @m1, align 4
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store i32 %a2, i32* @n1, align 4
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ret void
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}
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@m2 = internal global i32 0, align 4
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@n2 = internal global i32 0, align 4
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; CHECK-LABEL: f2:
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define void @f2(i32 %a1, i32 %a2, i32 %a3) #0 {
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; CHECK-NEXT: adrp x8, [[SET]]@PAGE
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; CHECK-NEXT: add x8, x8, [[SET]]@PAGEOFF
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; CHECK-NEXT: stp w0, w1, [x8]
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; CHECK-NEXT: str w2, [x8, #8]
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; CHECK-NEXT: ret
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store i32 %a1, i32* @m1, align 4
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store i32 %a2, i32* @n1, align 4
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store i32 %a3, i32* @o1, align 4
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ret void
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}
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; CHECK-LABEL: f3:
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define void @f3(i32 %a1, i32 %a2) #0 {
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; CHECK-NEXT: adrp x8, [[SET]]@PAGE
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; CHECK-NEXT: add x8, x8, [[SET]]@PAGEOFF
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; CHECK-NEXT: stp w0, w1, [x8, #12]
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; CHECK-NEXT: ret
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store i32 %a1, i32* @m2, align 4
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store i32 %a2, i32* @n2, align 4
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ret void
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}
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@o2 = internal global i32 0, align 4
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; CHECK-LABEL: f4:
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define void @f4(i32 %a1) #0 {
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; CHECK-NEXT: adrp x8, _o2@PAGE
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; CHECK-NEXT: str w0, [x8, _o2@PAGEOFF]
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; CHECK-NEXT: ret
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store i32 %a1, i32* @o2, align 4
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ret void
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}
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; CHECK-DAG: .zerofill __DATA,__bss,[[SET]],20,4
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; CHECK-DAG: .zerofill __DATA,__bss,_o2,4,2
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attributes #0 = { nounwind }
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