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llvm-mirror/test/CodeGen/AMDGPU/fold-vgpr-copy.mir
Joe Nash 521d6a1785 [AMDGPU] Add _e64 suffix to VOP3 Insts
Previously, instructions which could be
expressed as VOP3 in addition to another
encoding had a _e64 suffix on the tablegen
record name, while those
only available as VOP3 did not. With this
patch, all VOP3s will have the _e64 suffix.
The assembly does not change, only  the mir.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D94341

Change-Id: Ia8ec8890d47f8f94bbbdac43745b4e9dd2b03423
2021-01-12 18:33:18 -05:00

54 lines
1.9 KiB
YAML

# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=si-fold-operands,dead-mi-elimination -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s
# GCN-LABEL: name: fold_vgpr_to_vgpr_copy
# GCN: %0:vreg_64 = IMPLICIT_DEF
# GCN-NEXT: %1:vgpr_32 = IMPLICIT_DEF
# GCN-NEXT: %2:vgpr_32 = IMPLICIT_DEF
# GCN-NEXT: DS_WRITE2_B32_gfx9 %0.sub0, killed %1, killed %2, 0, 1, 0, implicit $exec
---
name: fold_vgpr_to_vgpr_copy
body: |
bb.0:
%0:vreg_64 = IMPLICIT_DEF
%4:vgpr_32 = IMPLICIT_DEF
%3:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = COPY %0.sub0
%2:vgpr_32 = COPY %1
DS_WRITE2_B32_gfx9 %2, killed %4, killed %3, 0, 1, 0, implicit $exec
...
# GCN-LABEL: name: fold_sgpr_to_vgpr_copy
# GCN: %0:sreg_64 = IMPLICIT_DEF
# GCN-NEXT: %1:vgpr_32 = IMPLICIT_DEF
# GCN-NEXT: %2:vgpr_32 = IMPLICIT_DEF
# GCN-NEXT: %4:vgpr_32 = COPY %0.sub0
# GCN-NEXT: DS_WRITE2_B32_gfx9 %4, killed %1, killed %2, 0, 1, 0, implicit $exec
name: fold_sgpr_to_vgpr_copy
body: |
bb.0:
%0:sreg_64 = IMPLICIT_DEF
%4:vgpr_32 = IMPLICIT_DEF
%3:vgpr_32 = IMPLICIT_DEF
%1:sgpr_32 = COPY %0.sub0
%2:vgpr_32 = COPY %1
DS_WRITE2_B32_gfx9 %2, killed %4, killed %3, 0, 1, 0, implicit $exec
...
# GCN-LABEL: name: fma_sgpr_use
# GCN: %0:sreg_64_xexec = IMPLICIT_DEF
# GCN-NEXT: %4:vgpr_32 = nnan ninf nsz arcp contract afn reassoc V_FMA_F32_e64 2, %0.sub0, 0, 1073741824, 0, %0.sub1, 0, 0, implicit $mode, implicit $exec
---
name: fma_sgpr_use
body: |
bb.0:
%0:sreg_64_xexec = IMPLICIT_DEF
%1:sgpr_32 = COPY %0.sub0
%2:sgpr_32 = COPY %0.sub1
%3:vgpr_32 = COPY %2
%4:vgpr_32 = nnan ninf nsz arcp contract afn reassoc V_FMAC_F32_e64 2, %1, 0, 1073741824, 0, %3, 0, 0, implicit $mode, implicit $exec
DS_WRITE2_B32_gfx9 undef %5:vgpr_32, killed %4, undef %6:vgpr_32, 0, 1, 0, implicit $exec
...