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https://github.com/RPCS3/llvm-mirror.git
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bf5889110e
Summary: This patch teaches ConstantFolding to constant fold both scalar and vector variants of llvm.smul.fix and llvm.smul.fix.sat. As described in the LangRef rounding is unspecified for these instrinsics. If the result cannot be represented exactly the default behavior in ConstantFolding is to round down towards negative infinity. If a target has a preferred rounding that is different some kind of target hook would be needed (same strategy as used by the SelectionDAG legalizer). Reviewers: nikic, leonardchan, RKSimon Reviewed By: leonardchan Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63385 llvm-svn: 363811
123 lines
4.1 KiB
LLVM
123 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -constprop -S | FileCheck %s
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;-----------------------------------------------------------------------------
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; Simple test using scalar layout.
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;-----------------------------------------------------------------------------
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declare i32 @llvm.smul.fix.i32(i32, i32, i32)
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define i32 @test_smul_fix_i32_0() {
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; CHECK-LABEL: @test_smul_fix_i32_0(
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; CHECK-NEXT: ret i32 536870912
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;
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%r = call i32 @llvm.smul.fix.i32(i32 1073741824, i32 1073741824, i32 31) ; 0.5 * 0.5
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ret i32 %r
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}
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;-----------------------------------------------------------------------------
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; More extensive tests based on vectors (basically using the scalar fold
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; for each index).
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;-----------------------------------------------------------------------------
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declare <8 x i3> @llvm.smul.fix.v8i3(<8 x i3>, <8 x i3>, i32)
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define <8 x i3> @test_smul_fix_v8i3_0() {
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; CHECK-LABEL: @test_smul_fix_v8i3_0(
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; CHECK-NEXT: ret <8 x i3> <i3 0, i3 -4, i3 0, i3 -4, i3 0, i3 -4, i3 0, i3 -4>
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;
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%r = call <8 x i3> @llvm.smul.fix.v8i3(
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<8 x i3> <i3 -4, i3 -3, i3 -2, i3 -1, i3 0, i3 1, i3 2, i3 3>,
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<8 x i3> <i3 -4, i3 -4, i3 -4, i3 -4, i3 -4, i3 -4, i3 -4, i3 -4>,
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i32 0)
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ret <8 x i3> %r
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}
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define <8 x i3> @test_smul_fix_v8i3_1() {
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; CHECK-LABEL: @test_smul_fix_v8i3_1(
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; CHECK-NEXT: ret <8 x i3> <i3 0, i3 -2, i3 -4, i3 2, i3 0, i3 -2, i3 -4, i3 2>
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;
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%r = call <8 x i3> @llvm.smul.fix.v8i3(
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<8 x i3> <i3 -4, i3 -3, i3 -2, i3 -1, i3 0, i3 1, i3 2, i3 3>,
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<8 x i3> <i3 -4, i3 -4, i3 -4, i3 -4, i3 -4, i3 -4, i3 -4, i3 -4>,
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i32 1)
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ret <8 x i3> %r
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}
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define <8 x i3> @test_smul_fix_v8i3_2() {
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; CHECK-LABEL: @test_smul_fix_v8i3_2(
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; CHECK-NEXT: ret <8 x i3> <i3 -4, i3 3, i3 2, i3 1, i3 0, i3 -1, i3 -2, i3 -3>
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;
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%r = call <8 x i3> @llvm.smul.fix.v8i3(
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<8 x i3> <i3 -4, i3 -3, i3 -2, i3 -1, i3 0, i3 1, i3 2, i3 3>,
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<8 x i3> <i3 -4, i3 -4, i3 -4, i3 -4, i3 -4, i3 -4, i3 -4, i3 -4>,
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i32 2)
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ret <8 x i3> %r
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}
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define <8 x i3> @test_smul_fix_v8i3_3() {
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; CHECK-LABEL: @test_smul_fix_v8i3_3(
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; CHECK-NEXT: ret <8 x i3> <i3 -4, i3 3, i3 2, i3 1, i3 0, i3 -1, i3 -2, i3 -3>
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;
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%r = call <8 x i3> @llvm.smul.fix.v8i3(
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<8 x i3> <i3 -4, i3 -3, i3 -2, i3 -1, i3 0, i3 1, i3 2, i3 3>,
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<8 x i3> <i3 -1, i3 -1, i3 -1, i3 -1, i3 -1, i3 -1, i3 -1, i3 -1>,
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i32 0)
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ret <8 x i3> %r
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}
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define <8 x i3> @test_smul_fix_v8i3_4() {
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; CHECK-LABEL: @test_smul_fix_v8i3_4(
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; CHECK-NEXT: ret <8 x i3> <i3 2, i3 1, i3 1, i3 0, i3 0, i3 -1, i3 -1, i3 -2>
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;
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%r = call <8 x i3> @llvm.smul.fix.v8i3(
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<8 x i3> <i3 -4, i3 -3, i3 -2, i3 -1, i3 0, i3 1, i3 2, i3 3>,
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<8 x i3> <i3 -1, i3 -1, i3 -1, i3 -1, i3 -1, i3 -1, i3 -1, i3 -1>,
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i32 1)
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ret <8 x i3> %r
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}
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define <8 x i3> @test_smul_fix_v8i3_5() {
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; CHECK-LABEL: @test_smul_fix_v8i3_5(
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; CHECK-NEXT: ret <8 x i3> <i3 1, i3 0, i3 0, i3 0, i3 0, i3 -1, i3 -1, i3 -1>
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;
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%r = call <8 x i3> @llvm.smul.fix.v8i3(
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<8 x i3> <i3 -4, i3 -3, i3 -2, i3 -1, i3 0, i3 1, i3 2, i3 3>,
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<8 x i3> <i3 -1, i3 -1, i3 -1, i3 -1, i3 -1, i3 -1, i3 -1, i3 -1>,
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i32 2)
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ret <8 x i3> %r
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}
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define <8 x i3> @test_smul_fix_v8i3_6() {
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; CHECK-LABEL: @test_smul_fix_v8i3_6(
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; CHECK-NEXT: ret <8 x i3> <i3 -4, i3 -1, i3 2, i3 -3, i3 0, i3 3, i3 -2, i3 1>
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;
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%r = call <8 x i3> @llvm.smul.fix.v8i3(
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<8 x i3> <i3 -4, i3 -3, i3 -2, i3 -1, i3 0, i3 1, i3 2, i3 3>,
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<8 x i3> <i3 3, i3 3, i3 3, i3 3, i3 3, i3 3, i3 3, i3 3>,
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i32 0)
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ret <8 x i3> %r
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}
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define <8 x i3> @test_smul_fix_v8i3_7() {
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; CHECK-LABEL: @test_smul_fix_v8i3_7(
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; CHECK-NEXT: ret <8 x i3> <i3 2, i3 3, i3 -3, i3 -2, i3 0, i3 1, i3 3, i3 -4>
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;
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%r = call <8 x i3> @llvm.smul.fix.v8i3(
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<8 x i3> <i3 -4, i3 -3, i3 -2, i3 -1, i3 0, i3 1, i3 2, i3 3>,
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<8 x i3> <i3 3, i3 3, i3 3, i3 3, i3 3, i3 3, i3 3, i3 3>,
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i32 1)
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ret <8 x i3> %r
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}
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define <8 x i3> @test_smul_fix_v8i3_8() {
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; CHECK-LABEL: @test_smul_fix_v8i3_8(
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; CHECK-NEXT: ret <8 x i3> <i3 -3, i3 -3, i3 -2, i3 -1, i3 0, i3 0, i3 1, i3 2>
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;
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%r = call <8 x i3> @llvm.smul.fix.v8i3(
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<8 x i3> <i3 -4, i3 -3, i3 -2, i3 -1, i3 0, i3 1, i3 2, i3 3>,
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<8 x i3> <i3 3, i3 3, i3 3, i3 3, i3 3, i3 3, i3 3, i3 3>,
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i32 2)
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ret <8 x i3> %r
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}
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