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00c379d824
This adds a llvm.aarch64.hint intrinsic to mirror the llvm.arm.hint in order to support the various hint intrinsic functions in the ACLE. Add an optional pattern field that permits the subclass to specify the pattern that matches the selection. The intrinsic pattern is set as mayLoad, mayStore, so overload the value for the definition of the hint instruction. llvm-svn: 212883
68 lines
1.1 KiB
LLVM
68 lines
1.1 KiB
LLVM
; RUN: llc -mtriple aarch64-eabi -o - %s | FileCheck %s
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declare void @llvm.aarch64.hint(i32) nounwind
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define void @hint_nop() {
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entry:
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tail call void @llvm.aarch64.hint(i32 0) nounwind
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ret void
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}
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; CHECK-LABEL: hint_nop
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; CHECK: nop
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define void @hint_yield() {
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entry:
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tail call void @llvm.aarch64.hint(i32 1) nounwind
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ret void
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}
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; CHECK-LABEL: hint_yield
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; CHECK: yield
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define void @hint_wfe() {
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entry:
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tail call void @llvm.aarch64.hint(i32 2) nounwind
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ret void
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}
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; CHECK-LABEL: hint_wfe
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; CHECK: wfe
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define void @hint_wfi() {
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entry:
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tail call void @llvm.aarch64.hint(i32 3) nounwind
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ret void
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}
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; CHECK-LABEL: hint_wfi
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; CHECK: wfi
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define void @hint_sev() {
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entry:
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tail call void @llvm.aarch64.hint(i32 4) nounwind
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ret void
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}
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; CHECK-LABEL: hint_sev
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; CHECK: sev
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define void @hint_sevl() {
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entry:
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tail call void @llvm.aarch64.hint(i32 5) nounwind
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ret void
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}
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; CHECK-LABEL: hint_sevl
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; CHECK: sevl
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define void @hint_undefined() {
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entry:
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tail call void @llvm.aarch64.hint(i32 8) nounwind
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ret void
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}
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; CHECK-LABEL: hint_undefined
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; CHECK: hint #0x8
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