1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 03:33:20 +01:00
llvm-mirror/test/CodeGen/PowerPC/ori_imm32.ll
Hiroshi Inoue fc231e5848 [PowerPC] better instruction selection for OR (XOR) with a 32-bit immediate
- recommitting after fixing a test failure on MacOS

On PPC64, OR (XOR) with a 32-bit immediate can be done with only two instructions, i.e. ori + oris.
But the current LLVM generates three or four instructions for this purpose (and also it clobbers one GPR).

This patch makes PPC backend generate ori + oris (xori + xoris) for OR (XOR) with a 32-bit immediate.

e.g. (x | 0xFFFFFFFF) should be

	ori 3, 3, 65535
	oris 3, 3, 65535

but LLVM generates without this patch

	li 4, 0
	oris 4, 4, 65535
	ori 4, 4, 65535
	or 3, 3, 4

Differential Revision: https://reviews.llvm.org/D34757

llvm-svn: 311538
2017-08-23 08:55:18 +00:00

97 lines
1.9 KiB
LLVM

; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s
define i64 @ori_test_a(i64 %a) {
entry:
; CHECK-LABEL: @ori_test_a
; CHECK-DAG: ori 3, 3, 65535
; CHECK-DAG: oris 3, 3, 65535
; CHECK-NEXT: blr
%or = or i64 %a, 4294967295
ret i64 %or
}
define i64 @ori_test_b(i64 %a) {
entry:
; CHECK-LABEL: @ori_test_b
; CHECK: or 3, 3, {{[0-9]+}}
; CHECK-NEXT: blr
%or = or i64 %a, 4294967296
ret i64 %or
}
define i64 @ori_test_c(i64 %a) {
entry:
; CHECK-LABEL: @ori_test_c
; CHECK: ori 3, 3, 65535
; CHECK-NEXT: blr
%or = or i64 %a, 65535
ret i64 %or
}
define i64 @ori_test_d(i64 %a) {
entry:
; CHECK-LABEL: @ori_test_d
; CHECK: oris 3, 3, 1
; CHECK-NEXT: blr
%or = or i64 %a, 65536
ret i64 %or
}
define zeroext i32 @ori_test_e(i32 zeroext %a) {
entry:
; CHECK-LABEL: @ori_test_e
; CHECK-DAG: ori 3, 3, 65535
; CHECK-DAG: oris 3, 3, 255
; CHECK-NEXT: blr
%or = or i32 %a, 16777215
ret i32 %or
}
define i64 @xori_test_a(i64 %a) {
entry:
; CHECK-LABEL: @xori_test_a
; CHECK-DAG: xori 3, 3, 65535
; CHECK-DAG: xoris 3, 3, 65535
; CHECK-NEXT: blr
%xor = xor i64 %a, 4294967295
ret i64 %xor
}
define i64 @xori_test_b(i64 %a) {
entry:
; CHECK-LABEL: @xori_test_b
; CHECK: xor 3, 3, {{[0-9]+}}
; CHECK-NEXT: blr
%xor = xor i64 %a, 4294967296
ret i64 %xor
}
define i64 @xori_test_c(i64 %a) {
entry:
; CHECK-LABEL: @xori_test_c
; CHECK: xori 3, 3, 65535
; CHECK-NEXT: blr
%xor = xor i64 %a, 65535
ret i64 %xor
}
define i64 @xori_test_d(i64 %a) {
entry:
; CHECK-LABEL: @xori_test_d
; CHECK: xoris 3, 3, 1
; CHECK-NEXT: blr
%xor = xor i64 %a, 65536
ret i64 %xor
}
define zeroext i32 @xori_test_e(i32 zeroext %a) {
entry:
; CHECK-LABEL: @xori_test_e
; CHECK-DAG: xori 3, 3, 65535
; CHECK-DAG: xoris 3, 3, 255
; CHECK-NEXT: blr
%xor = xor i32 %a, 16777215
ret i32 %xor
}