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3e5853048c
Summary: This required adding the instruction predicate HasMips32r5. Patch by Scott Egerton. Reviewers: dsanders, vkalintiris Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11136 llvm-svn: 242666
9 lines
302 B
ArmAsm
9 lines
302 B
ArmAsm
# Instructions that are invalid
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#
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# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r3 \
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# RUN: 2>%t1
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# RUN: FileCheck %s < %t1
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.set noat
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eretnc # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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