1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 11:13:28 +01:00
llvm-mirror/test/CodeGen
Sander de Smalen bccf0ebdc1 [LiveDebugValues] Handle spill locations with a fixed and scalable component.
This patch fixes the two LiveDebugValues implementations
(InstrRef/VarLoc)Based to handle cases where the StackOffset contains
both a fixed and scalable component.

This depends on the `TargetRegisterInfo::prependOffsetExpression` being
added in D90020. Feel free to leave comments on that patch if you have them.

Reviewed By: djtodoro, jmorse

Differential Revision: https://reviews.llvm.org/D90046
2021-01-06 11:30:13 +00:00
..
AArch64 [LiveDebugValues] Handle spill locations with a fixed and scalable component. 2021-01-06 11:30:13 +00:00
AMDGPU [NFC] Removed unused prefixes in CodeGen/AMDGPU 2021-01-05 20:22:40 -08:00
ARC
ARM [ARM] Handle any extend whilst lowering addw/addl/subw/subl 2021-01-06 11:26:39 +00:00
AVR
BPF
Generic
Hexagon
Inputs
Lanai
Mips
MIR
MSP430
NVPTX
PowerPC [RegisterClassInfo] Return non-zero for RC without allocatable reg 2021-01-05 16:18:34 +00:00
RISCV [RISCV][NFC] Add new test cases for mul 2021-01-06 18:55:56 +08:00
SPARC
SystemZ
Thumb
Thumb2
VE
WebAssembly [WebAssembly] Prototype prefetch instructions 2021-01-05 11:32:03 -08:00
WinCFGuard
WinEH
X86 [X86][AVX] combineVectorSignBitsTruncation - use PACKSS/PACKUS in more AVX cases 2021-01-05 15:01:45 +00:00
XCore