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3de6f07d48
Summary: This patch clears up some of the semantics within the Stage class. Now, preExecute can be called multiple times per simulated cycle. Previously preExecute was only called once per cycle, and postExecute could have been called multiple times. Now, cycleStart/cycleEnd are called only once per simulated cycle. preExecute/postExecute can be called multiple times per cycle. This occurs because multiple execution events can occur during a single cycle. When stages are executed (Pipeline::runCycle), the postExecute hook will be called only if all Stages return a success from their 'execute' callback. Reviewers: andreadb, courbet, RKSimon Reviewed By: andreadb Subscribers: tschuett, gbedwell, llvm-commits Differential Revision: https://reviews.llvm.org/D49250 llvm-svn: 336959
82 lines
2.8 KiB
C++
82 lines
2.8 KiB
C++
//===--------------------- Pipeline.h ---------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// This file implements an ordered container of stages that simulate the
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/// pipeline of a hardware backend.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TOOLS_LLVM_MCA_PIPELINE_H
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#define LLVM_TOOLS_LLVM_MCA_PIPELINE_H
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#include "Scheduler.h"
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#include "Stage.h"
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#include "llvm/ADT/SmallVector.h"
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namespace mca {
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class HWEventListener;
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class HWInstructionEvent;
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class HWStallEvent;
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/// A pipeline for a specific subtarget.
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///
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/// It emulates an out-of-order execution of instructions. Instructions are
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/// fetched from a MCInst sequence managed by an initial 'Fetch' stage.
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/// Instructions are firstly fetched, then dispatched to the schedulers, and
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/// then executed.
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///
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/// This class tracks the lifetime of an instruction from the moment where
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/// it gets dispatched to the schedulers, to the moment where it finishes
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/// executing and register writes are architecturally committed.
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/// In particular, it monitors changes in the state of every instruction
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/// in flight.
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///
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/// Instructions are executed in a loop of iterations. The number of iterations
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/// is defined by the SourceMgr object, which is managed by the initial stage
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/// of the instruction pipeline.
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///
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/// The Pipeline entry point is method 'run()' which executes cycles in a loop
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/// until there are new instructions to dispatch, and not every instruction
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/// has been retired.
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///
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/// Internally, the Pipeline collects statistical information in the form of
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/// histograms. For example, it tracks how the dispatch group size changes
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/// over time.
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class Pipeline {
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Pipeline(const Pipeline &P) = delete;
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Pipeline &operator=(const Pipeline &P) = delete;
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/// An ordered list of stages that define this instruction pipeline.
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llvm::SmallVector<std::unique_ptr<Stage>, 8> Stages;
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std::set<HWEventListener *> Listeners;
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unsigned Cycles;
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void preExecuteStages(const InstRef &IR);
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bool executeStages(InstRef &IR);
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void postExecuteStages(const InstRef &IR);
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bool hasWorkToProcess();
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void runCycle(unsigned Cycle);
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public:
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Pipeline(unsigned DispatchWidth = 0, unsigned RegisterFileSize = 0,
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unsigned LoadQueueSize = 0, unsigned StoreQueueSize = 0,
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bool AssumeNoAlias = false)
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: Cycles(0) {}
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void appendStage(std::unique_ptr<Stage> S) { Stages.push_back(std::move(S)); }
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void run();
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void addEventListener(HWEventListener *Listener);
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void notifyCycleBegin(unsigned Cycle);
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void notifyCycleEnd(unsigned Cycle);
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};
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} // namespace mca
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#endif // LLVM_TOOLS_LLVM_MCA_PIPELINE_H
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