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https://github.com/RPCS3/llvm-mirror.git
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6a500d5451
Fixes the overflow case of llvm.*absdiff intrinsic also updats the tests and LangRef.rst accordingly. Differential Revision: http://reviews.llvm.org/D11678 llvm-svn: 248483
182 lines
5.4 KiB
LLVM
182 lines
5.4 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
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declare <4 x i8> @llvm.uabsdiff.v4i8(<4 x i8>, <4 x i8>)
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define <4 x i8> @test_uabsdiff_v4i8_expand(<4 x i8> %a1, <4 x i8> %a2) {
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; CHECK-LABEL: test_uabsdiff_v4i8_expand
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; CHECK: pshufd
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; CHECK: movd
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; CHECK: subl
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; CHECK: punpckldq
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; CHECK-DAG: movd %xmm1, [[SRC:%.*]]
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; CHECK-DAG: movd %xmm0, [[DST:%.*]]
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; CHECK: subl [[SRC]], [[DST]]
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; CHECK: movd
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; CHECK: pshufd
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; CHECK: movd
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; CHECK: punpckldq
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; CHECK: movdqa
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; CHECK: retq
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%1 = call <4 x i8> @llvm.uabsdiff.v4i8(<4 x i8> %a1, <4 x i8> %a2)
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ret <4 x i8> %1
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}
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declare <4 x i8> @llvm.sabsdiff.v4i8(<4 x i8>, <4 x i8>)
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define <4 x i8> @test_sabsdiff_v4i8_expand(<4 x i8> %a1, <4 x i8> %a2) {
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; CHECK-LABEL: test_sabsdiff_v4i8_expand
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; CHECK: psubd
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; CHECK: pcmpgtd
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; CHECK: pcmpeqd
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; CHECK: pxor
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; CHECK-DAG: psubd {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
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; CHECK-DAG: pandn {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
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; CHECK-DAG: pandn [[SRC1]], [[DST:%xmm[0-9]+]]
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; CHECK: por [[SRC2]], [[DST]]
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; CHECK: retq
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%1 = call <4 x i8> @llvm.sabsdiff.v4i8(<4 x i8> %a1, <4 x i8> %a2)
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ret <4 x i8> %1
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}
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declare <8 x i8> @llvm.sabsdiff.v8i8(<8 x i8>, <8 x i8>)
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define <8 x i8> @test_sabsdiff_v8i8_expand(<8 x i8> %a1, <8 x i8> %a2) {
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; CHECK-LABEL: test_sabsdiff_v8i8_expand
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; CHECK: psubw
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; CHECK: pcmpgtw
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; CHECK: pcmpeqd
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; CHECK: pxor
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; CHECK-DAG: psubw {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
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; CHECK-DAG: pandn {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
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; CHECK-DAG: pandn [[SRC1]], [[DST:%xmm[0-9]+]]
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; CHECK: por [[SRC2]], [[DST]]
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; CHECK: retq
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%1 = call <8 x i8> @llvm.sabsdiff.v8i8(<8 x i8> %a1, <8 x i8> %a2)
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ret <8 x i8> %1
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}
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declare <16 x i8> @llvm.uabsdiff.v16i8(<16 x i8>, <16 x i8>)
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define <16 x i8> @test_uabsdiff_v16i8_expand(<16 x i8> %a1, <16 x i8> %a2) {
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; CHECK-LABEL: test_uabsdiff_v16i8_expand
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; CHECK: movd
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; CHECK: movzbl
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; CHECK: movzbl
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; CHECK: subl
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; CHECK: punpcklbw
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; CHECK: retq
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%1 = call <16 x i8> @llvm.uabsdiff.v16i8(<16 x i8> %a1, <16 x i8> %a2)
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ret <16 x i8> %1
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}
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declare <8 x i16> @llvm.uabsdiff.v8i16(<8 x i16>, <8 x i16>)
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define <8 x i16> @test_uabsdiff_v8i16_expand(<8 x i16> %a1, <8 x i16> %a2) {
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; CHECK-LABEL: test_uabsdiff_v8i16_expand
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; CHECK: pextrw
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; CHECK: pextrw
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; CHECK: subl
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; CHECK: punpcklwd
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; CHECK: retq
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%1 = call <8 x i16> @llvm.uabsdiff.v8i16(<8 x i16> %a1, <8 x i16> %a2)
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ret <8 x i16> %1
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}
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declare <8 x i16> @llvm.sabsdiff.v8i16(<8 x i16>, <8 x i16>)
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define <8 x i16> @test_sabsdiff_v8i16_expand(<8 x i16> %a1, <8 x i16> %a2) {
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; CHECK-LABEL: test_sabsdiff_v8i16_expand
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; CHECK: psubw
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; CHECK: pcmpgtw
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; CHECK: pcmpeqd
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; CHECK: pxor
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; CHECK-DAG: psubw {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
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; CHECK-DAG: pandn {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
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; CHECK-DAG: pandn [[SRC1]], [[DST:%xmm[0-9]+]]
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; CHECK: por [[SRC2]], [[DST]]
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; CHECK: retq
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%1 = call <8 x i16> @llvm.sabsdiff.v8i16(<8 x i16> %a1, <8 x i16> %a2)
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ret <8 x i16> %1
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}
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declare <4 x i32> @llvm.sabsdiff.v4i32(<4 x i32>, <4 x i32>)
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define <4 x i32> @test_sabsdiff_v4i32_expand(<4 x i32> %a1, <4 x i32> %a2) {
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; CHECK-LABEL: test_sabsdiff_v4i32_expand
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; CHECK: psubd
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; CHECK: pcmpgtd
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; CHECK: pcmpeqd
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; CHECK: pxor
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; CHECK-DAG: psubd {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
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; CHECK-DAG: pandn {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
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; CHECK-DAG: pandn [[SRC1]], [[DST:%xmm[0-9]+]]
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; CHECK: por [[SRC2]], [[DST]]
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; CHECK: retq
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%1 = call <4 x i32> @llvm.sabsdiff.v4i32(<4 x i32> %a1, <4 x i32> %a2)
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ret <4 x i32> %1
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}
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declare <4 x i32> @llvm.uabsdiff.v4i32(<4 x i32>, <4 x i32>)
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define <4 x i32> @test_uabsdiff_v4i32_expand(<4 x i32> %a1, <4 x i32> %a2) {
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; CHECK-LABEL: test_uabsdiff_v4i32_expand
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; CHECK: pshufd
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; CHECK: movd
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; CHECK: subl
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; CHECK: punpckldq
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; CHECK-DAG: movd %xmm1, [[SRC:%.*]]
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; CHECK-DAG: movd %xmm0, [[DST:%.*]]
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; CHECK: subl [[SRC]], [[DST]]
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; CHECK: movd
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; CHECK: pshufd
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; CHECK: movd
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; CHECK: punpckldq
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; CHECK: movdqa
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; CHECK: retq
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%1 = call <4 x i32> @llvm.uabsdiff.v4i32(<4 x i32> %a1, <4 x i32> %a2)
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ret <4 x i32> %1
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}
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declare <2 x i32> @llvm.sabsdiff.v2i32(<2 x i32>, <2 x i32>)
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define <2 x i32> @test_sabsdiff_v2i32_expand(<2 x i32> %a1, <2 x i32> %a2) {
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; CHECK-LABEL: test_sabsdiff_v2i32_expand
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; CHECK: psubq
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; CHECK: pcmpgtd
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; CHECK: pcmpeqd
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; CHECK: pxor
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; CHECK-DAG: psubq {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
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; CHECK-DAG: pandn {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
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; CHECK-DAG: pandn [[SRC1]], [[DST:%xmm[0-9]+]]
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; CHECK: por [[SRC2]], [[DST]]
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; CHECK: retq
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%1 = call <2 x i32> @llvm.sabsdiff.v2i32(<2 x i32> %a1, <2 x i32> %a2)
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ret <2 x i32> %1
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}
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declare <2 x i64> @llvm.sabsdiff.v2i64(<2 x i64>, <2 x i64>)
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define <2 x i64> @test_sabsdiff_v2i64_expand(<2 x i64> %a1, <2 x i64> %a2) {
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; CHECK-LABEL: test_sabsdiff_v2i64_expand
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; CHECK: psubq
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; CHECK: pcmpgtd
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; CHECK: pcmpeqd
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; CHECK: pxor
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; CHECK-DAG: psubq {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
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; CHECK-DAG: pandn {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
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; CHECK-DAG: pandn [[SRC1]], [[DST:%xmm[0-9]+]]
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; CHECK: por [[SRC2]], [[DST]]
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; CHECK: retq
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%1 = call <2 x i64> @llvm.sabsdiff.v2i64(<2 x i64> %a1, <2 x i64> %a2)
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ret <2 x i64> %1
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}
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