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5f6f8101d5
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt llvm-svn: 72897
34 lines
1.4 KiB
LLVM
34 lines
1.4 KiB
LLVM
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
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define i64 @__divsc3(float %a, float %b, float %c, float %d) nounwind readnone {
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entry:
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br i1 false, label %bb56, label %bb33
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bb33: ; preds = %entry
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br label %bb56
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bb56: ; preds = %bb33, %entry
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%tmp36.pn = phi float [ 0.000000e+00, %bb33 ], [ 0.000000e+00, %entry ] ; <float> [#uses=1]
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%b.pn509 = phi float [ %b, %bb33 ], [ %a, %entry ] ; <float> [#uses=1]
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%a.pn = phi float [ %a, %bb33 ], [ %b, %entry ] ; <float> [#uses=1]
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%tmp41.pn508 = phi float [ 0.000000e+00, %bb33 ], [ 0.000000e+00, %entry ] ; <float> [#uses=1]
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%tmp51.pn = phi float [ 0.000000e+00, %bb33 ], [ %a, %entry ] ; <float> [#uses=1]
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%tmp44.pn = fmul float %tmp36.pn, %b.pn509 ; <float> [#uses=1]
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%tmp46.pn = fadd float %tmp44.pn, %a.pn ; <float> [#uses=1]
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%tmp53.pn = fsub float 0.000000e+00, %tmp51.pn ; <float> [#uses=1]
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%x.0 = fdiv float %tmp46.pn, %tmp41.pn508 ; <float> [#uses=1]
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%y.0 = fdiv float %tmp53.pn, 0.000000e+00 ; <float> [#uses=1]
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br i1 false, label %bb433, label %bb98
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bb98: ; preds = %bb56
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%tmp102 = fmul float 0.000000e+00, %a ; <float> [#uses=1]
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%tmp106 = fmul float 0.000000e+00, %b ; <float> [#uses=1]
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br label %bb433
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bb433: ; preds = %bb98, %bb56
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%x.1 = phi float [ %tmp102, %bb98 ], [ %x.0, %bb56 ] ; <float> [#uses=0]
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%y.1 = phi float [ %tmp106, %bb98 ], [ %y.0, %bb56 ] ; <float> [#uses=1]
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%tmp460 = fadd float %y.1, 0.000000e+00 ; <float> [#uses=0]
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ret i64 0
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}
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