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41 lines
1.9 KiB
LLVM
41 lines
1.9 KiB
LLVM
; RUN: llc < %s -march=arm -mattr=+vfp2 -post-RA-scheduler -mcpu=cortex-a8
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; ModuleID = '<stdin>'
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
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target triple = "armv7-apple-darwin9"
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%struct.tree = type { i32, double, double, %struct.tree*, %struct.tree*, %struct.tree*, %struct.tree* }
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@g = common global %struct.tree* null
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define arm_apcscc %struct.tree* @tsp(%struct.tree* %t, i32 %nproc) nounwind {
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entry:
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%t.idx51.val.i = load double* null ; <double> [#uses=1]
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br i1 undef, label %bb4.i, label %bb.i
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bb.i: ; preds = %entry
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unreachable
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bb4.i: ; preds = %entry
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%0 = load %struct.tree** @g, align 4 ; <%struct.tree*> [#uses=2]
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%.idx45.i = getelementptr %struct.tree* %0, i32 0, i32 1 ; <double*> [#uses=1]
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%.idx45.val.i = load double* %.idx45.i ; <double> [#uses=1]
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%.idx46.i = getelementptr %struct.tree* %0, i32 0, i32 2 ; <double*> [#uses=1]
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%.idx46.val.i = load double* %.idx46.i ; <double> [#uses=1]
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%1 = fsub double 0.000000e+00, %.idx45.val.i ; <double> [#uses=2]
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%2 = fmul double %1, %1 ; <double> [#uses=1]
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%3 = fsub double %t.idx51.val.i, %.idx46.val.i ; <double> [#uses=2]
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%4 = fmul double %3, %3 ; <double> [#uses=1]
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%5 = fadd double %2, %4 ; <double> [#uses=1]
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%6 = tail call double @llvm.sqrt.f64(double %5) nounwind ; <double> [#uses=1]
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br i1 undef, label %bb7.i4, label %bb6.i
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bb6.i: ; preds = %bb4.i
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br label %bb7.i4
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bb7.i4: ; preds = %bb6.i, %bb4.i
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%tton1.0.i = phi double [ %6, %bb6.i ], [ undef, %bb4.i ] ; <double> [#uses=0]
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unreachable
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}
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declare double @llvm.sqrt.f64(double) nounwind readonly
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