1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 11:42:57 +01:00
llvm-mirror/test/MC/Mips/virt/valid-micromips.s
Petar Jovanovic 648fe59146 [mips] Add support for Virtualization ASE
This includes

  Instructions: tlbginv, tlbginvf, tlbgp, tlbgr, tlbgwi, tlbgwr, hypcall
                mfgc0, mtgc0, mfhgc0, mthgc0, dmfgc0, dmtgc0,

  Assembler directives: .set virt, .set novirt, .module virt, .module novirt

  Attribute: virt

  .MIPS.abiflags: VZ (0x100)

Patch by Vladimir Stefanovic.

Differential Revision: https://reviews.llvm.org/D44905

llvm-svn: 331024
2018-04-27 09:12:08 +00:00

20 lines
1.4 KiB
ArmAsm

# RUN: llvm-mc %s -triple=mips-unknown-linux-gnu -show-encoding \
# RUN: -mcpu=mips32r5 -mattr=+micromips,+virt | FileCheck %s
mfgc0 $4, $5 # CHECK: mfgc0 $4, $5, 0 # encoding: [0x00,0x85,0x04,0xfc]
mfgc0 $4, $5, 2 # CHECK: mfgc0 $4, $5, 2 # encoding: [0x00,0x85,0x14,0xfc]
mtgc0 $5, $4 # CHECK: mtgc0 $5, $4, 0 # encoding: [0x00,0xa4,0x06,0xfc]
mtgc0 $5, $4, 2 # CHECK: mtgc0 $5, $4, 2 # encoding: [0x00,0xa4,0x16,0xfc]
mthgc0 $5, $4 # CHECK: mthgc0 $5, $4, 0 # encoding: [0x00,0xa4,0x06,0xf4]
mthgc0 $5, $4, 1 # CHECK: mthgc0 $5, $4, 1 # encoding: [0x00,0xa4,0x0e,0xf4]
mfhgc0 $5, $4 # CHECK: mfhgc0 $5, $4, 0 # encoding: [0x00,0xa4,0x04,0xf4]
mfhgc0 $5, $4, 7 # CHECK: mfhgc0 $5, $4, 7 # encoding: [0x00,0xa4,0x3c,0xf4]
hypcall # CHECK: hypcall # encoding: [0x00,0x00,0xc3,0x7c]
hypcall 10 # CHECK: hypcall 10 # encoding: [0x00,0x0a,0xc3,0x7c]
tlbginv # CHECK: tlbginv # encoding: [0x00,0x00,0x41,0x7c]
tlbginvf # CHECK: tlbginvf # encoding: [0x00,0x00,0x51,0x7c]
tlbgp # CHECK: tlbgp # encoding: [0x00,0x00,0x01,0x7c]
tlbgr # CHECK: tlbgr # encoding: [0x00,0x00,0x11,0x7c]
tlbgwi # CHECK: tlbgwi # encoding: [0x00,0x00,0x21,0x7c]
tlbgwr # CHECK: tlbgwr # encoding: [0x00,0x00,0x31,0x7c]