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llvm-mirror/test/Transforms/SimplifyCFG/FoldValueComparisonIntoPredecessors-no-new-successors.ll
Roman Lebedev a7fa6b8e79 [NFCI-ish][SimplifyCFGPass] Rework and generalize ret block tail-merging
This changes the approach taken to tail-merge the blocks
to always create a new block instead of trying to reuse some block,
and generalizes it to support dealing not with just the `ret` in the future.

This effectively lifts the CallBr restriction, although this isn't really intentional.
That is the only non-NFC change here, i'm not sure if it's reasonable/feasible to temporarily retain it.

Other restrictions of the transform remain.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D104598
2021-06-23 14:33:18 +03:00

36 lines
1008 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -simplifycfg -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck %s
define void @widget(i32 %arg) {
; CHECK-LABEL: @widget(
; CHECK-NEXT: bb:
; CHECK-NEXT: [[SWITCH:%.*]] = icmp ult i32 [[ARG:%.*]], 2
; CHECK-NEXT: br i1 [[SWITCH]], label [[COMMON_RET:%.*]], label [[INFLOOP:%.*]]
; CHECK: common.ret:
; CHECK-NEXT: ret void
; CHECK: infloop:
; CHECK-NEXT: br label [[INFLOOP]]
;
bb:
%tmp = icmp eq i32 %arg, 0
br i1 %tmp, label %bb2, label %bb1
bb1: ; preds = %bb1
%tmp4 = icmp eq i32 %arg, 1
br i1 %tmp4, label %bb6, label %bb5
bb5: ; preds = %bb5, %bb5
switch i32 %arg, label %bb5 [
i32 0, label %bb9
]
bb2:
ret void
bb6: ; preds = %bb1
ret void
bb9: ; preds = %bb5
ret void
}