mirror of
https://github.com/RPCS3/llvm-mirror.git
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386 lines
12 KiB
LLVM
386 lines
12 KiB
LLVM
; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s
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;
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; <rdar://problem/14486451>
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%struct.a = type [256 x i16]
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%struct.b = type [256 x i32]
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%struct.c = type [256 x i64]
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define i16 @load_halfword(%struct.a* %ctx, i32 %xor72) nounwind {
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; CHECK-LABEL: load_halfword:
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; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
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; CHECK: ldrh w0, [x0, [[REG]], lsl #1]
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%shr81 = lshr i32 %xor72, 9
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%conv82 = zext i32 %shr81 to i64
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%idxprom83 = and i64 %conv82, 255
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%arrayidx86 = getelementptr inbounds %struct.a, %struct.a* %ctx, i64 0, i64 %idxprom83
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%result = load i16, i16* %arrayidx86, align 2
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ret i16 %result
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}
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define i32 @load_word(%struct.b* %ctx, i32 %xor72) nounwind {
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; CHECK-LABEL: load_word:
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; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
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; CHECK: ldr w0, [x0, [[REG]], lsl #2]
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%shr81 = lshr i32 %xor72, 9
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%conv82 = zext i32 %shr81 to i64
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%idxprom83 = and i64 %conv82, 255
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%arrayidx86 = getelementptr inbounds %struct.b, %struct.b* %ctx, i64 0, i64 %idxprom83
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%result = load i32, i32* %arrayidx86, align 4
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ret i32 %result
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}
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define i64 @load_doubleword(%struct.c* %ctx, i32 %xor72) nounwind {
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; CHECK-LABEL: load_doubleword:
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; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
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; CHECK: ldr x0, [x0, [[REG]], lsl #3]
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%shr81 = lshr i32 %xor72, 9
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%conv82 = zext i32 %shr81 to i64
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%idxprom83 = and i64 %conv82, 255
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%arrayidx86 = getelementptr inbounds %struct.c, %struct.c* %ctx, i64 0, i64 %idxprom83
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%result = load i64, i64* %arrayidx86, align 8
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ret i64 %result
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}
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define void @store_halfword(%struct.a* %ctx, i32 %xor72, i16 %val) nounwind {
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; CHECK-LABEL: store_halfword:
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; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
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; CHECK: strh w2, [x0, [[REG]], lsl #1]
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%shr81 = lshr i32 %xor72, 9
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%conv82 = zext i32 %shr81 to i64
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%idxprom83 = and i64 %conv82, 255
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%arrayidx86 = getelementptr inbounds %struct.a, %struct.a* %ctx, i64 0, i64 %idxprom83
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store i16 %val, i16* %arrayidx86, align 8
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ret void
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}
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define void @store_word(%struct.b* %ctx, i32 %xor72, i32 %val) nounwind {
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; CHECK-LABEL: store_word:
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; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
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; CHECK: str w2, [x0, [[REG]], lsl #2]
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%shr81 = lshr i32 %xor72, 9
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%conv82 = zext i32 %shr81 to i64
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%idxprom83 = and i64 %conv82, 255
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%arrayidx86 = getelementptr inbounds %struct.b, %struct.b* %ctx, i64 0, i64 %idxprom83
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store i32 %val, i32* %arrayidx86, align 8
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ret void
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}
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define void @store_doubleword(%struct.c* %ctx, i32 %xor72, i64 %val) nounwind {
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; CHECK-LABEL: store_doubleword:
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; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
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; CHECK: str x2, [x0, [[REG]], lsl #3]
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%shr81 = lshr i32 %xor72, 9
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%conv82 = zext i32 %shr81 to i64
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%idxprom83 = and i64 %conv82, 255
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%arrayidx86 = getelementptr inbounds %struct.c, %struct.c* %ctx, i64 0, i64 %idxprom83
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store i64 %val, i64* %arrayidx86, align 8
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ret void
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}
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; Check that we combine a shift into the offset instead of using a narrower load
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; when we have a load followed by a trunc
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define i32 @load_doubleword_trunc_word(i64* %ptr, i64 %off) {
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; CHECK-LABEL: load_doubleword_trunc_word:
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; CHECK: ldr x0, [x0, x1, lsl #3]
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entry:
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%idx = getelementptr inbounds i64, i64* %ptr, i64 %off
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%x = load i64, i64* %idx, align 8
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%trunc = trunc i64 %x to i32
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ret i32 %trunc
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}
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define i16 @load_doubleword_trunc_halfword(i64* %ptr, i64 %off) {
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; CHECK-LABEL: load_doubleword_trunc_halfword:
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; CHECK: ldr x0, [x0, x1, lsl #3]
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entry:
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%idx = getelementptr inbounds i64, i64* %ptr, i64 %off
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%x = load i64, i64* %idx, align 8
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%trunc = trunc i64 %x to i16
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ret i16 %trunc
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}
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define i8 @load_doubleword_trunc_byte(i64* %ptr, i64 %off) {
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; CHECK-LABEL: load_doubleword_trunc_byte:
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; CHECK: ldr x0, [x0, x1, lsl #3]
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entry:
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%idx = getelementptr inbounds i64, i64* %ptr, i64 %off
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%x = load i64, i64* %idx, align 8
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%trunc = trunc i64 %x to i8
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ret i8 %trunc
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}
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define i16 @load_word_trunc_halfword(i32* %ptr, i64 %off) {
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entry:
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; CHECK-LABEL: load_word_trunc_halfword:
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; CHECK: ldr w0, [x0, x1, lsl #2]
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%idx = getelementptr inbounds i32, i32* %ptr, i64 %off
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%x = load i32, i32* %idx, align 8
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%trunc = trunc i32 %x to i16
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ret i16 %trunc
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}
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define i8 @load_word_trunc_byte(i32* %ptr, i64 %off) {
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; CHECK-LABEL: load_word_trunc_byte:
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; CHECK: ldr w0, [x0, x1, lsl #2]
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entry:
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%idx = getelementptr inbounds i32, i32* %ptr, i64 %off
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%x = load i32, i32* %idx, align 8
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%trunc = trunc i32 %x to i8
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ret i8 %trunc
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}
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define i8 @load_halfword_trunc_byte(i16* %ptr, i64 %off) {
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; CHECK-LABEL: load_halfword_trunc_byte:
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; CHECK: ldrh w0, [x0, x1, lsl #1]
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entry:
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%idx = getelementptr inbounds i16, i16* %ptr, i64 %off
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%x = load i16, i16* %idx, align 8
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%trunc = trunc i16 %x to i8
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ret i8 %trunc
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}
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; Check that we do use a narrower load, and so don't combine the shift, when
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; the loaded value is zero-extended.
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define i64 @load_doubleword_trunc_word_zext(i64* %ptr, i64 %off) {
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; CHECK-LABEL: load_doubleword_trunc_word_zext:
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; CHECK: lsl [[REG:x[0-9]+]], x1, #3
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; CHECK: ldr w0, [x0, [[REG]]]
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entry:
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%idx = getelementptr inbounds i64, i64* %ptr, i64 %off
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%x = load i64, i64* %idx, align 8
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%trunc = trunc i64 %x to i32
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%ext = zext i32 %trunc to i64
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ret i64 %ext
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}
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define i64 @load_doubleword_trunc_halfword_zext(i64* %ptr, i64 %off) {
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; CHECK-LABEL: load_doubleword_trunc_halfword_zext:
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; CHECK: lsl [[REG:x[0-9]+]], x1, #3
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; CHECK: ldrh w0, [x0, [[REG]]]
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entry:
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%idx = getelementptr inbounds i64, i64* %ptr, i64 %off
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%x = load i64, i64* %idx, align 8
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%trunc = trunc i64 %x to i16
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%ext = zext i16 %trunc to i64
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ret i64 %ext
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}
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define i64 @load_doubleword_trunc_byte_zext(i64* %ptr, i64 %off) {
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; CHECK-LABEL: load_doubleword_trunc_byte_zext:
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; CHECK: lsl [[REG:x[0-9]+]], x1, #3
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; CHECK: ldrb w0, [x0, [[REG]]]
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entry:
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%idx = getelementptr inbounds i64, i64* %ptr, i64 %off
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%x = load i64, i64* %idx, align 8
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%trunc = trunc i64 %x to i8
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%ext = zext i8 %trunc to i64
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ret i64 %ext
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}
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define i64 @load_word_trunc_halfword_zext(i32* %ptr, i64 %off) {
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; CHECK-LABEL: load_word_trunc_halfword_zext:
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; CHECK: lsl [[REG:x[0-9]+]], x1, #2
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; CHECK: ldrh w0, [x0, [[REG]]]
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entry:
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%idx = getelementptr inbounds i32, i32* %ptr, i64 %off
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%x = load i32, i32* %idx, align 8
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%trunc = trunc i32 %x to i16
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%ext = zext i16 %trunc to i64
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ret i64 %ext
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}
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define i64 @load_word_trunc_byte_zext(i32* %ptr, i64 %off) {
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; CHECK-LABEL: load_word_trunc_byte_zext:
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; CHECK: lsl [[REG:x[0-9]+]], x1, #2
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; CHECK: ldrb w0, [x0, [[REG]]]
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entry:
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%idx = getelementptr inbounds i32, i32* %ptr, i64 %off
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%x = load i32, i32* %idx, align 8
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%trunc = trunc i32 %x to i8
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%ext = zext i8 %trunc to i64
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ret i64 %ext
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}
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define i64 @load_halfword_trunc_byte_zext(i16* %ptr, i64 %off) {
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; CHECK-LABEL: load_halfword_trunc_byte_zext:
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; CHECK: lsl [[REG:x[0-9]+]], x1, #1
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; CHECK: ldrb w0, [x0, [[REG]]]
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entry:
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%idx = getelementptr inbounds i16, i16* %ptr, i64 %off
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%x = load i16, i16* %idx, align 8
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%trunc = trunc i16 %x to i8
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%ext = zext i8 %trunc to i64
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ret i64 %ext
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}
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; Check that we do use a narrower load, and so don't combine the shift, when
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; the loaded value is sign-extended.
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define i64 @load_doubleword_trunc_word_sext(i64* %ptr, i64 %off) {
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; CHECK-LABEL: load_doubleword_trunc_word_sext:
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; CHECK: lsl [[REG:x[0-9]+]], x1, #3
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; CHECK: ldrsw x0, [x0, [[REG]]]
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entry:
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%idx = getelementptr inbounds i64, i64* %ptr, i64 %off
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%x = load i64, i64* %idx, align 8
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%trunc = trunc i64 %x to i32
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%ext = sext i32 %trunc to i64
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ret i64 %ext
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}
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define i64 @load_doubleword_trunc_halfword_sext(i64* %ptr, i64 %off) {
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; CHECK-LABEL: load_doubleword_trunc_halfword_sext:
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; CHECK: lsl [[REG:x[0-9]+]], x1, #3
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; CHECK: ldrsh x0, [x0, [[REG]]]
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entry:
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%idx = getelementptr inbounds i64, i64* %ptr, i64 %off
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%x = load i64, i64* %idx, align 8
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%trunc = trunc i64 %x to i16
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%ext = sext i16 %trunc to i64
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ret i64 %ext
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}
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define i64 @load_doubleword_trunc_byte_sext(i64* %ptr, i64 %off) {
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; CHECK-LABEL: load_doubleword_trunc_byte_sext:
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; CHECK: lsl [[REG:x[0-9]+]], x1, #3
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; CHECK: ldrsb x0, [x0, [[REG]]]
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entry:
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%idx = getelementptr inbounds i64, i64* %ptr, i64 %off
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%x = load i64, i64* %idx, align 8
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%trunc = trunc i64 %x to i8
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%ext = sext i8 %trunc to i64
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ret i64 %ext
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}
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define i64 @load_word_trunc_halfword_sext(i32* %ptr, i64 %off) {
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; CHECK-LABEL: load_word_trunc_halfword_sext:
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; CHECK: lsl [[REG:x[0-9]+]], x1, #2
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; CHECK: ldrsh x0, [x0, [[REG]]]
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entry:
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%idx = getelementptr inbounds i32, i32* %ptr, i64 %off
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%x = load i32, i32* %idx, align 8
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%trunc = trunc i32 %x to i16
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%ext = sext i16 %trunc to i64
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ret i64 %ext
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}
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define i64 @load_word_trunc_byte_sext(i32* %ptr, i64 %off) {
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; CHECK-LABEL: load_word_trunc_byte_sext:
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; CHECK: lsl [[REG:x[0-9]+]], x1, #2
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; CHECK: ldrsb x0, [x0, [[REG]]]
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entry:
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%idx = getelementptr inbounds i32, i32* %ptr, i64 %off
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%x = load i32, i32* %idx, align 8
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%trunc = trunc i32 %x to i8
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%ext = sext i8 %trunc to i64
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ret i64 %ext
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}
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define i64 @load_halfword_trunc_byte_sext(i16* %ptr, i64 %off) {
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; CHECK-LABEL: load_halfword_trunc_byte_sext:
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; CHECK: lsl [[REG:x[0-9]+]], x1, #1
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; CHECK: ldrsb x0, [x0, [[REG]]]
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entry:
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%idx = getelementptr inbounds i16, i16* %ptr, i64 %off
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%x = load i16, i16* %idx, align 8
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%trunc = trunc i16 %x to i8
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%ext = sext i8 %trunc to i64
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ret i64 %ext
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}
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; Check that we don't combine the shift, and so will use a narrower load, when
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; the shift is used more than once.
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define i32 @load_doubleword_trunc_word_reuse_shift(i64* %ptr, i64 %off) {
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; CHECK-LABEL: load_doubleword_trunc_word_reuse_shift:
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; CHECK: lsl x[[REG1:[0-9]+]], x1, #3
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; CHECK: ldr w[[REG2:[0-9]+]], [x0, x[[REG1]]]
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; CHECK: add w0, w[[REG2]], w[[REG1]]
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entry:
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%idx = getelementptr inbounds i64, i64* %ptr, i64 %off
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%x = load i64, i64* %idx, align 8
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%trunc = trunc i64 %x to i32
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%lsl = shl i64 %off, 3
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%lsl.trunc = trunc i64 %lsl to i32
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%add = add i32 %trunc, %lsl.trunc
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ret i32 %add
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}
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define i16 @load_doubleword_trunc_halfword_reuse_shift(i64* %ptr, i64 %off) {
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; CHECK-LABEL: load_doubleword_trunc_halfword_reuse_shift:
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; CHECK: lsl x[[REG1:[0-9]+]], x1, #3
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; CHECK: ldrh w[[REG2:[0-9]+]], [x0, x[[REG1]]]
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; CHECK: add w0, w[[REG2]], w[[REG1]]
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entry:
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%idx = getelementptr inbounds i64, i64* %ptr, i64 %off
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%x = load i64, i64* %idx, align 8
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%trunc = trunc i64 %x to i16
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%lsl = shl i64 %off, 3
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%lsl.trunc = trunc i64 %lsl to i16
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%add = add i16 %trunc, %lsl.trunc
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ret i16 %add
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}
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define i8 @load_doubleword_trunc_byte_reuse_shift(i64* %ptr, i64 %off) {
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; CHECK-LABEL: load_doubleword_trunc_byte_reuse_shift:
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; CHECK: lsl x[[REG1:[0-9]+]], x1, #3
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; CHECK: ldrb w[[REG2:[0-9]+]], [x0, x[[REG1]]]
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; CHECK: add w0, w[[REG2]], w[[REG1]]
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entry:
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%idx = getelementptr inbounds i64, i64* %ptr, i64 %off
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%x = load i64, i64* %idx, align 8
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%trunc = trunc i64 %x to i8
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%lsl = shl i64 %off, 3
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%lsl.trunc = trunc i64 %lsl to i8
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%add = add i8 %trunc, %lsl.trunc
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ret i8 %add
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}
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define i16 @load_word_trunc_halfword_reuse_shift(i32* %ptr, i64 %off) {
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entry:
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; CHECK-LABEL: load_word_trunc_halfword_reuse_shift:
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; CHECK: lsl x[[REG1:[0-9]+]], x1, #2
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; CHECK: ldrh w[[REG2:[0-9]+]], [x0, x[[REG1]]]
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; CHECK: add w0, w[[REG2]], w[[REG1]]
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%idx = getelementptr inbounds i32, i32* %ptr, i64 %off
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%x = load i32, i32* %idx, align 8
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%trunc = trunc i32 %x to i16
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%lsl = shl i64 %off, 2
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%lsl.trunc = trunc i64 %lsl to i16
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%add = add i16 %trunc, %lsl.trunc
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ret i16 %add
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}
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define i8 @load_word_trunc_byte_reuse_shift(i32* %ptr, i64 %off) {
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; CHECK-LABEL: load_word_trunc_byte_reuse_shift:
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; CHECK: lsl x[[REG1:[0-9]+]], x1, #2
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; CHECK: ldrb w[[REG2:[0-9]+]], [x0, x[[REG1]]]
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; CHECK: add w0, w[[REG2]], w[[REG1]]
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entry:
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%idx = getelementptr inbounds i32, i32* %ptr, i64 %off
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%x = load i32, i32* %idx, align 8
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%trunc = trunc i32 %x to i8
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%lsl = shl i64 %off, 2
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%lsl.trunc = trunc i64 %lsl to i8
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%add = add i8 %trunc, %lsl.trunc
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ret i8 %add
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}
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define i8 @load_halfword_trunc_byte_reuse_shift(i16* %ptr, i64 %off) {
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; CHECK-LABEL: load_halfword_trunc_byte_reuse_shift:
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; CHECK: lsl x[[REG1:[0-9]+]], x1, #1
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; CHECK: ldrb w[[REG2:[0-9]+]], [x0, x[[REG1]]]
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; CHECK: add w0, w[[REG2]], w[[REG1]]
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entry:
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%idx = getelementptr inbounds i16, i16* %ptr, i64 %off
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%x = load i16, i16* %idx, align 8
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%trunc = trunc i16 %x to i8
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%lsl = shl i64 %off, 1
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%lsl.trunc = trunc i64 %lsl to i8
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%add = add i8 %trunc, %lsl.trunc
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ret i8 %add
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}
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