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213 lines
5.9 KiB
YAML
213 lines
5.9 KiB
YAML
# RUN: llc -mtriple=aarch64-linux-gnu -run-pass=greedy %s -o - | FileCheck %s
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# RUN: llc -mtriple=aarch64-linux-gnu -start-before=greedy -stop-after=aarch64-expand-pseudo %s -o - | FileCheck %s --check-prefix=EXPAND
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--- |
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; ModuleID = '<stdin>'
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source_filename = "<stdin>"
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64--linux-gnu"
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define aarch64_sve_vector_pcs void @spills_fills_stack_id_ppr() #0 { entry: unreachable }
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define aarch64_sve_vector_pcs void @spills_fills_stack_id_zpr() #0 { entry: unreachable }
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define aarch64_sve_vector_pcs void @spills_fills_stack_id_zpr2() #0 { entry: unreachable }
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define aarch64_sve_vector_pcs void @spills_fills_stack_id_zpr3() #0 { entry: unreachable }
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define aarch64_sve_vector_pcs void @spills_fills_stack_id_zpr4() #0 { entry: unreachable }
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attributes #0 = { nounwind "target-features"="+sve" }
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...
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---
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name: spills_fills_stack_id_ppr
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tracksRegLiveness: true
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registers:
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- { id: 0, class: ppr }
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stack:
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liveins:
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- { reg: '$p0', virtual-reg: '%0' }
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body: |
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bb.0.entry:
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liveins: $p0
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; CHECK-LABEL: name: spills_fills_stack_id_ppr
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; CHECK: stack:
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; CHECK: - { id: 0, name: '', type: spill-slot, offset: 0, size: 2, alignment: 2
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; CHECK-NEXT: stack-id: scalable-vector, callee-saved-register: ''
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; EXPAND-LABEL: name: spills_fills_stack_id_ppr
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; EXPAND: STR_PXI $p0, $sp, 7
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; EXPAND: $p0 = LDR_PXI $sp, 7
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%0:ppr = COPY $p0
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$p0 = IMPLICIT_DEF
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$p1 = IMPLICIT_DEF
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$p2 = IMPLICIT_DEF
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$p3 = IMPLICIT_DEF
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$p4 = IMPLICIT_DEF
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$p5 = IMPLICIT_DEF
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$p6 = IMPLICIT_DEF
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$p7 = IMPLICIT_DEF
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$p8 = IMPLICIT_DEF
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$p9 = IMPLICIT_DEF
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$p10 = IMPLICIT_DEF
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$p11 = IMPLICIT_DEF
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$p12 = IMPLICIT_DEF
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$p13 = IMPLICIT_DEF
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$p14 = IMPLICIT_DEF
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$p15 = IMPLICIT_DEF
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$p0 = COPY %0
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RET_ReallyLR
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...
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---
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name: spills_fills_stack_id_zpr
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tracksRegLiveness: true
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registers:
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- { id: 0, class: zpr }
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stack:
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liveins:
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- { reg: '$z0', virtual-reg: '%0' }
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body: |
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bb.0.entry:
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liveins: $z0
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; CHECK-LABEL: name: spills_fills_stack_id_zpr
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; CHECK: stack:
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; CHECK: - { id: 0, name: '', type: spill-slot, offset: 0, size: 16, alignment: 16
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; CHECK-NEXT: stack-id: scalable-vector, callee-saved-register: ''
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; EXPAND-LABEL: name: spills_fills_stack_id_zpr
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; EXPAND: STR_ZXI $z0, $sp, 0
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; EXPAND: $z0 = LDR_ZXI $sp, 0
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%0:zpr = COPY $z0
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$z0_z1_z2_z3 = IMPLICIT_DEF
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$z4_z5_z6_z7 = IMPLICIT_DEF
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$z8_z9_z10_z11 = IMPLICIT_DEF
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$z12_z13_z14_z15 = IMPLICIT_DEF
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$z16_z17_z18_z19 = IMPLICIT_DEF
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$z20_z21_z22_z23 = IMPLICIT_DEF
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$z24_z25_z26_z27 = IMPLICIT_DEF
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$z28_z29_z30_z31 = IMPLICIT_DEF
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$z0 = COPY %0
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RET_ReallyLR
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...
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---
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name: spills_fills_stack_id_zpr2
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tracksRegLiveness: true
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registers:
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- { id: 0, class: zpr2 }
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stack:
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liveins:
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- { reg: '$z0_z1', virtual-reg: '%0' }
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body: |
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bb.0.entry:
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liveins: $z0_z1
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; CHECK-LABEL: name: spills_fills_stack_id_zpr2
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; CHECK: stack:
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; CHECK: - { id: 0, name: '', type: spill-slot, offset: 0, size: 32, alignment: 16
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; CHECK-NEXT: stack-id: scalable-vector
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; EXPAND-LABEL: name: spills_fills_stack_id_zpr2
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; EXPAND: STR_ZXI $z0, $sp, 0
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; EXPAND: STR_ZXI $z1, $sp, 1
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; EXPAND: $z0 = LDR_ZXI $sp, 0
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; EXPAND: $z1 = LDR_ZXI $sp, 1
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%0:zpr2 = COPY $z0_z1
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$z0_z1_z2_z3 = IMPLICIT_DEF
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$z4_z5_z6_z7 = IMPLICIT_DEF
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$z8_z9_z10_z11 = IMPLICIT_DEF
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$z12_z13_z14_z15 = IMPLICIT_DEF
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$z16_z17_z18_z19 = IMPLICIT_DEF
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$z20_z21_z22_z23 = IMPLICIT_DEF
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$z24_z25_z26_z27 = IMPLICIT_DEF
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$z28_z29_z30_z31 = IMPLICIT_DEF
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$z0_z1 = COPY %0
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RET_ReallyLR
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...
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---
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name: spills_fills_stack_id_zpr3
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tracksRegLiveness: true
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registers:
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- { id: 0, class: zpr3 }
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stack:
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liveins:
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- { reg: '$z0_z1_z2', virtual-reg: '%0' }
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body: |
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bb.0.entry:
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liveins: $z0_z1_z2
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; CHECK-LABEL: name: spills_fills_stack_id_zpr3
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; CHECK: stack:
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; CHECK: - { id: 0, name: '', type: spill-slot, offset: 0, size: 48, alignment: 16
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; CHECK-NEXT: stack-id: scalable-vector
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; EXPAND-LABEL: name: spills_fills_stack_id_zpr3
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; EXPAND: STR_ZXI $z0, $sp, 0
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; EXPAND: STR_ZXI $z1, $sp, 1
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; EXPAND: STR_ZXI $z2, $sp, 2
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; EXPAND: $z0 = LDR_ZXI $sp, 0
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; EXPAND: $z1 = LDR_ZXI $sp, 1
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; EXPAND: $z2 = LDR_ZXI $sp, 2
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%0:zpr3 = COPY $z0_z1_z2
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$z0_z1_z2_z3 = IMPLICIT_DEF
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$z4_z5_z6_z7 = IMPLICIT_DEF
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$z8_z9_z10_z11 = IMPLICIT_DEF
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$z12_z13_z14_z15 = IMPLICIT_DEF
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$z16_z17_z18_z19 = IMPLICIT_DEF
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$z20_z21_z22_z23 = IMPLICIT_DEF
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$z24_z25_z26_z27 = IMPLICIT_DEF
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$z28_z29_z30_z31 = IMPLICIT_DEF
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$z0_z1_z2 = COPY %0
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RET_ReallyLR
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...
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---
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name: spills_fills_stack_id_zpr4
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tracksRegLiveness: true
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registers:
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- { id: 0, class: zpr4 }
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stack:
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liveins:
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- { reg: '$z0_z1_z2_z3', virtual-reg: '%0' }
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body: |
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bb.0.entry:
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liveins: $z0_z1_z2_z3
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; CHECK-LABEL: name: spills_fills_stack_id_zpr4
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; CHECK: stack:
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; CHECK: - { id: 0, name: '', type: spill-slot, offset: 0, size: 64, alignment: 16
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; CHECK-NEXT: stack-id: scalable-vector
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; EXPAND-LABEL: name: spills_fills_stack_id_zpr4
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; EXPAND: STR_ZXI $z0, $sp, 0
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; EXPAND: STR_ZXI $z1, $sp, 1
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; EXPAND: STR_ZXI $z2, $sp, 2
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; EXPAND: STR_ZXI $z3, $sp, 3
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; EXPAND: $z0 = LDR_ZXI $sp, 0
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; EXPAND: $z1 = LDR_ZXI $sp, 1
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; EXPAND: $z2 = LDR_ZXI $sp, 2
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; EXPAND: $z3 = LDR_ZXI $sp, 3
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%0:zpr4 = COPY $z0_z1_z2_z3
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$z0_z1_z2_z3 = IMPLICIT_DEF
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$z4_z5_z6_z7 = IMPLICIT_DEF
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$z8_z9_z10_z11 = IMPLICIT_DEF
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$z12_z13_z14_z15 = IMPLICIT_DEF
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$z16_z17_z18_z19 = IMPLICIT_DEF
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$z20_z21_z22_z23 = IMPLICIT_DEF
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$z24_z25_z26_z27 = IMPLICIT_DEF
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$z28_z29_z30_z31 = IMPLICIT_DEF
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$z0_z1_z2_z3 = COPY %0
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RET_ReallyLR
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...
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