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50a1ea2ba8
This fixes an assertion failure that was being triggered in SelectionDAG::getZeroExtendInReg(), where it was trying to extend the <2xi32> to i64 (which should have been <2xi64>). Fixes: rdar://66016901 Differential Revision: https://reviews.llvm.org/D84884
22 lines
792 B
LLVM
22 lines
792 B
LLVM
; RUN: llc < %s -mtriple=arm64_32-apple-watchos2.0.0 --aarch64-neon-syntax=generic | FileCheck %s
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target datalayout = "e-m:o-p:32:32-i64:64-i128:128-n32:64-S128"
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target triple = "arm64_32-apple-watchos2.0.0"
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; CHECK-LABEL: lCPI0_0:
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; CHECK-NEXT: .quad 36
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; CHECK-NEXT: .quad 4804
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define <2 x i8*> @vector_gep(<2 x i8*> %0) {
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; CHECK-LABEL: vector_gep:
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; CHECK: adrp x[[REG8:[123]?[0-9]]], lCPI0_0@PAGE
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; CHECK: ldr q[[REG1:[0-9]+]], [x[[REG8]], lCPI0_0@PAGEOFF]
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; CHECK: add v[[REG0:[0-9]+]].2d, v[[REG0]].2d, v[[REG1]].2d
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; CHECK: movi v[[REG1]].2d, #0x000000ffffffff
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; CHECK: and v[[REG0]].16b, v[[REG0]].16b, v[[REG1]].16b
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; CHECK: ret
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entry:
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%1 = getelementptr i8, <2 x i8*> %0, <2 x i32> <i32 36, i32 4804>
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ret <2 x i8*> %1
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}
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