mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-22 18:54:02 +01:00
b6a0e78067
As FIXME said, they really should be checking for a single user, not use, so let's do that. It is not *that* unusual to have the same value as incoming value in a PHI node, not unlike how a PHI may have the same incoming basic block more than once. There isn't a nice way to do that, Value::users() isn't uniqified, and Value only tracks it's uses, not Users, so the check is potentially costly since it does indeed potentially involes traversing the entire use list of a value.
358 lines
12 KiB
LLVM
358 lines
12 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -instcombine < %s | FileCheck %s
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declare void @usei32i32agg({ i32, i32 })
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; If we have a phi of insertvalues, we can sink it,
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; Here, we only need a PHI for inserted values.
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define { i32, i32 } @test0({ i32, i32 } %agg, i32 %val_left, i32 %val_right, i1 %c) {
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; CHECK-LABEL: @test0(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[LEFT:%.*]], label [[RIGHT:%.*]]
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; CHECK: left:
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; CHECK-NEXT: br label [[END:%.*]]
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; CHECK: right:
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[VAL_LEFT_PN:%.*]] = phi i32 [ [[VAL_LEFT:%.*]], [[LEFT]] ], [ [[VAL_RIGHT:%.*]], [[RIGHT]] ]
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; CHECK-NEXT: [[R:%.*]] = insertvalue { i32, i32 } [[AGG:%.*]], i32 [[VAL_LEFT_PN]], 0
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; CHECK-NEXT: ret { i32, i32 } [[R]]
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;
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entry:
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br i1 %c, label %left, label %right
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left:
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%i0 = insertvalue { i32, i32 } %agg, i32 %val_left, 0
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br label %end
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right:
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%i1 = insertvalue { i32, i32 } %agg, i32 %val_right, 0
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br label %end
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end:
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%r = phi { i32, i32 } [ %i0, %left ], [ %i1, %right ]
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ret { i32, i32 } %r
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}
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; But only if the insertvalues have no extra uses
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define { i32, i32 } @test1_extrause0({ i32, i32 } %agg, i32 %val_left, i32 %val_right, i1 %c) {
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; CHECK-LABEL: @test1_extrause0(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[LEFT:%.*]], label [[RIGHT:%.*]]
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; CHECK: left:
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; CHECK-NEXT: [[I0:%.*]] = insertvalue { i32, i32 } [[AGG:%.*]], i32 [[VAL_LEFT:%.*]], 0
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; CHECK-NEXT: call void @usei32i32agg({ i32, i32 } [[I0]])
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; CHECK-NEXT: br label [[END:%.*]]
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; CHECK: right:
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; CHECK-NEXT: [[I1:%.*]] = insertvalue { i32, i32 } [[AGG]], i32 [[VAL_RIGHT:%.*]], 0
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[R:%.*]] = phi { i32, i32 } [ [[I0]], [[LEFT]] ], [ [[I1]], [[RIGHT]] ]
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; CHECK-NEXT: ret { i32, i32 } [[R]]
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;
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entry:
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br i1 %c, label %left, label %right
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left:
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%i0 = insertvalue { i32, i32 } %agg, i32 %val_left, 0
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call void @usei32i32agg({ i32, i32 } %i0 )
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br label %end
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right:
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%i1 = insertvalue { i32, i32 } %agg, i32 %val_right, 0
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br label %end
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end:
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%r = phi { i32, i32 } [ %i0, %left ], [ %i1, %right ]
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ret { i32, i32 } %r
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}
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define { i32, i32 } @test2_extrause1({ i32, i32 } %agg, i32 %val_left, i32 %val_right, i1 %c) {
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; CHECK-LABEL: @test2_extrause1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[LEFT:%.*]], label [[RIGHT:%.*]]
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; CHECK: left:
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; CHECK-NEXT: [[I0:%.*]] = insertvalue { i32, i32 } [[AGG:%.*]], i32 [[VAL_LEFT:%.*]], 0
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; CHECK-NEXT: br label [[END:%.*]]
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; CHECK: right:
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; CHECK-NEXT: [[I1:%.*]] = insertvalue { i32, i32 } [[AGG]], i32 [[VAL_RIGHT:%.*]], 0
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; CHECK-NEXT: call void @usei32i32agg({ i32, i32 } [[I1]])
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[R:%.*]] = phi { i32, i32 } [ [[I0]], [[LEFT]] ], [ [[I1]], [[RIGHT]] ]
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; CHECK-NEXT: ret { i32, i32 } [[R]]
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;
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entry:
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br i1 %c, label %left, label %right
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left:
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%i0 = insertvalue { i32, i32 } %agg, i32 %val_left, 0
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br label %end
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right:
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%i1 = insertvalue { i32, i32 } %agg, i32 %val_right, 0
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call void @usei32i32agg({ i32, i32 } %i1 )
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br label %end
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end:
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%r = phi { i32, i32 } [ %i0, %left ], [ %i1, %right ]
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ret { i32, i32 } %r
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}
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define { i32, i32 } @test3_extrause2({ i32, i32 } %agg, i32 %val_left, i32 %val_right, i1 %c) {
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; CHECK-LABEL: @test3_extrause2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[LEFT:%.*]], label [[RIGHT:%.*]]
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; CHECK: left:
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; CHECK-NEXT: [[I0:%.*]] = insertvalue { i32, i32 } [[AGG:%.*]], i32 [[VAL_LEFT:%.*]], 0
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; CHECK-NEXT: call void @usei32i32agg({ i32, i32 } [[I0]])
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; CHECK-NEXT: br label [[END:%.*]]
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; CHECK: right:
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; CHECK-NEXT: [[I1:%.*]] = insertvalue { i32, i32 } [[AGG]], i32 [[VAL_RIGHT:%.*]], 0
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; CHECK-NEXT: call void @usei32i32agg({ i32, i32 } [[I1]])
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[R:%.*]] = phi { i32, i32 } [ [[I0]], [[LEFT]] ], [ [[I1]], [[RIGHT]] ]
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; CHECK-NEXT: ret { i32, i32 } [[R]]
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;
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entry:
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br i1 %c, label %left, label %right
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left:
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%i0 = insertvalue { i32, i32 } %agg, i32 %val_left, 0
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call void @usei32i32agg({ i32, i32 } %i0 )
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br label %end
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right:
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%i1 = insertvalue { i32, i32 } %agg, i32 %val_right, 0
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call void @usei32i32agg({ i32, i32 } %i1 )
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br label %end
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end:
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%r = phi { i32, i32 } [ %i0, %left ], [ %i1, %right ]
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ret { i32, i32 } %r
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}
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; Here, we only need a PHI for base aggregate
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define { i32, i32 } @test4({ i32, i32 } %agg_left, { i32, i32 } %agg_right, i32 %val, i1 %c) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[LEFT:%.*]], label [[RIGHT:%.*]]
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; CHECK: left:
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; CHECK-NEXT: br label [[END:%.*]]
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; CHECK: right:
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[AGG_LEFT_PN:%.*]] = phi { i32, i32 } [ [[AGG_LEFT:%.*]], [[LEFT]] ], [ [[AGG_RIGHT:%.*]], [[RIGHT]] ]
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; CHECK-NEXT: [[R:%.*]] = insertvalue { i32, i32 } [[AGG_LEFT_PN]], i32 [[VAL:%.*]], 0
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; CHECK-NEXT: ret { i32, i32 } [[R]]
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;
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entry:
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br i1 %c, label %left, label %right
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left:
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%i0 = insertvalue { i32, i32 } %agg_left, i32 %val, 0
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br label %end
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right:
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%i1 = insertvalue { i32, i32 } %agg_right, i32 %val, 0
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br label %end
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end:
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%r = phi { i32, i32 } [ %i0, %left ], [ %i1, %right ]
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ret { i32, i32 } %r
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}
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; Here, we need a PHI for both the base and the inserted value
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define { i32, i32 } @test5({ i32, i32 } %agg_left, { i32, i32 } %agg_right, i32 %val_left, i32 %val_right, i1 %c) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[LEFT:%.*]], label [[RIGHT:%.*]]
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; CHECK: left:
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; CHECK-NEXT: br label [[END:%.*]]
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; CHECK: right:
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[AGG_LEFT_PN:%.*]] = phi { i32, i32 } [ [[AGG_LEFT:%.*]], [[LEFT]] ], [ [[AGG_RIGHT:%.*]], [[RIGHT]] ]
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; CHECK-NEXT: [[VAL_LEFT_PN:%.*]] = phi i32 [ [[VAL_LEFT:%.*]], [[LEFT]] ], [ [[VAL_RIGHT:%.*]], [[RIGHT]] ]
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; CHECK-NEXT: [[R:%.*]] = insertvalue { i32, i32 } [[AGG_LEFT_PN]], i32 [[VAL_LEFT_PN]], 0
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; CHECK-NEXT: ret { i32, i32 } [[R]]
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;
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entry:
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br i1 %c, label %left, label %right
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left:
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%i0 = insertvalue { i32, i32 } %agg_left, i32 %val_left, 0
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br label %end
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right:
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%i1 = insertvalue { i32, i32 } %agg_right, i32 %val_right, 0
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br label %end
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end:
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%r = phi { i32, i32 } [ %i0, %left ], [ %i1, %right ]
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ret { i32, i32 } %r
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}
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; But the indicies must match
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define { i32, i32 } @test6({ i32, i32 } %agg, i32 %val_left, i32 %val_right, i1 %c) {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[LEFT:%.*]], label [[RIGHT:%.*]]
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; CHECK: left:
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; CHECK-NEXT: [[I0:%.*]] = insertvalue { i32, i32 } [[AGG:%.*]], i32 [[VAL_LEFT:%.*]], 0
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; CHECK-NEXT: br label [[END:%.*]]
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; CHECK: right:
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; CHECK-NEXT: [[I1:%.*]] = insertvalue { i32, i32 } [[AGG]], i32 [[VAL_RIGHT:%.*]], 1
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[R:%.*]] = phi { i32, i32 } [ [[I0]], [[LEFT]] ], [ [[I1]], [[RIGHT]] ]
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; CHECK-NEXT: ret { i32, i32 } [[R]]
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;
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entry:
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br i1 %c, label %left, label %right
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left:
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%i0 = insertvalue { i32, i32 } %agg, i32 %val_left, 0
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br label %end
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right:
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%i1 = insertvalue { i32, i32 } %agg, i32 %val_right, 1
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br label %end
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end:
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%r = phi { i32, i32 } [ %i0, %left ], [ %i1, %right ]
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ret { i32, i32 } %r
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}
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; More complex aggregates are fine, too, as long as indicies match.
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define {{ i32, i32 }, { i32, i32 }} @test7({{ i32, i32 }, { i32, i32 }} %agg, i32 %val_left, i32 %val_right, i1 %c) {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[LEFT:%.*]], label [[RIGHT:%.*]]
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; CHECK: left:
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; CHECK-NEXT: br label [[END:%.*]]
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; CHECK: right:
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[VAL_LEFT_PN:%.*]] = phi i32 [ [[VAL_LEFT:%.*]], [[LEFT]] ], [ [[VAL_RIGHT:%.*]], [[RIGHT]] ]
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; CHECK-NEXT: [[R:%.*]] = insertvalue { { i32, i32 }, { i32, i32 } } [[AGG:%.*]], i32 [[VAL_LEFT_PN]], 0, 0
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; CHECK-NEXT: ret { { i32, i32 }, { i32, i32 } } [[R]]
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;
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entry:
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br i1 %c, label %left, label %right
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left:
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%i0 = insertvalue {{ i32, i32 }, { i32, i32 }} %agg, i32 %val_left, 0, 0
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br label %end
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right:
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%i1 = insertvalue {{ i32, i32 }, { i32, i32 }} %agg, i32 %val_right, 0, 0
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br label %end
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end:
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%r = phi {{ i32, i32 }, { i32, i32 }} [ %i0, %left ], [ %i1, %right ]
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ret {{ i32, i32 }, { i32, i32 }} %r
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}
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; The indicies must fully match, on all levels.
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define {{ i32, i32 }, { i32, i32 }} @test8({{ i32, i32 }, { i32, i32 }} %agg, i32 %val_left, i32 %val_right, i1 %c) {
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; CHECK-LABEL: @test8(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[LEFT:%.*]], label [[RIGHT:%.*]]
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; CHECK: left:
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; CHECK-NEXT: [[I0:%.*]] = insertvalue { { i32, i32 }, { i32, i32 } } [[AGG:%.*]], i32 [[VAL_LEFT:%.*]], 0, 0
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; CHECK-NEXT: br label [[END:%.*]]
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; CHECK: right:
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; CHECK-NEXT: [[I1:%.*]] = insertvalue { { i32, i32 }, { i32, i32 } } [[AGG]], i32 [[VAL_RIGHT:%.*]], 0, 1
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[R:%.*]] = phi { { i32, i32 }, { i32, i32 } } [ [[I0]], [[LEFT]] ], [ [[I1]], [[RIGHT]] ]
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; CHECK-NEXT: ret { { i32, i32 }, { i32, i32 } } [[R]]
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;
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entry:
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br i1 %c, label %left, label %right
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left:
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%i0 = insertvalue {{ i32, i32 }, { i32, i32 }} %agg, i32 %val_left, 0, 0
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br label %end
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right:
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%i1 = insertvalue {{ i32, i32 }, { i32, i32 }} %agg, i32 %val_right, 0, 1
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br label %end
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end:
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%r = phi {{ i32, i32 }, { i32, i32 }} [ %i0, %left ], [ %i1, %right ]
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ret {{ i32, i32 }, { i32, i32 }} %r
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}
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; It is fine if there are multiple uses of the PHI's value, as long as they are all in the PHI node itself
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define { i32, i32 } @test9({ i32, i32 } %agg, i32 %val_left, i32 %val_right, i1 %c0, i1 %c1) {
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; CHECK-LABEL: @test9(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C0:%.*]], label [[END:%.*]], label [[DISPATCH:%.*]]
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; CHECK: dispatch:
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; CHECK-NEXT: br i1 [[C1:%.*]], label [[LEFT:%.*]], label [[RIGHT:%.*]]
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; CHECK: left:
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; CHECK-NEXT: br label [[END]]
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; CHECK: right:
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[VAL_LEFT_PN:%.*]] = phi i32 [ [[VAL_LEFT:%.*]], [[ENTRY:%.*]] ], [ [[VAL_LEFT]], [[LEFT]] ], [ [[VAL_RIGHT:%.*]], [[RIGHT]] ]
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; CHECK-NEXT: [[R:%.*]] = insertvalue { i32, i32 } [[AGG:%.*]], i32 [[VAL_LEFT_PN]], 0
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; CHECK-NEXT: ret { i32, i32 } [[R]]
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;
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entry:
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%i0 = insertvalue { i32, i32 } %agg, i32 %val_left, 0
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%i1 = insertvalue { i32, i32 } %agg, i32 %val_right, 0
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br i1 %c0, label %end, label %dispatch
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dispatch:
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br i1 %c1, label %left, label %right
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left:
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br label %end
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right:
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br label %end
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end:
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%r = phi { i32, i32 } [ %i0, %entry ], [ %i0, %left ], [ %i1, %right ]
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ret { i32, i32 } %r
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}
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; Which isn't the case here, there is a legitimate external use.
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define { i32, i32 } @test10({ i32, i32 } %agg, i32 %val_left, i32 %val_right, i1 %c0, i1 %c1) {
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; CHECK-LABEL: @test10(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[I0:%.*]] = insertvalue { i32, i32 } [[AGG:%.*]], i32 [[VAL_LEFT:%.*]], 0
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; CHECK-NEXT: [[I1:%.*]] = insertvalue { i32, i32 } [[AGG]], i32 [[VAL_RIGHT:%.*]], 0
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; CHECK-NEXT: call void @usei32i32agg({ i32, i32 } [[I0]])
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; CHECK-NEXT: br i1 [[C0:%.*]], label [[END:%.*]], label [[DISPATCH:%.*]]
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; CHECK: dispatch:
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; CHECK-NEXT: br i1 [[C1:%.*]], label [[LEFT:%.*]], label [[RIGHT:%.*]]
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; CHECK: left:
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; CHECK-NEXT: br label [[END]]
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; CHECK: right:
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[R:%.*]] = phi { i32, i32 } [ [[I0]], [[ENTRY:%.*]] ], [ [[I0]], [[LEFT]] ], [ [[I1]], [[RIGHT]] ]
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; CHECK-NEXT: ret { i32, i32 } [[R]]
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;
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entry:
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%i0 = insertvalue { i32, i32 } %agg, i32 %val_left, 0
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%i1 = insertvalue { i32, i32 } %agg, i32 %val_right, 0
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call void @usei32i32agg({ i32, i32 } %i0)
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br i1 %c0, label %end, label %dispatch
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dispatch:
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br i1 %c1, label %left, label %right
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left:
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br label %end
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right:
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br label %end
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end:
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%r = phi { i32, i32 } [ %i0, %entry ], [ %i0, %left ], [ %i1, %right ]
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ret { i32, i32 } %r
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}
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