mirror of
https://github.com/RPCS3/llvm-mirror.git
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bf8ef9fdc3
This is a repeat of 1880092722 from 2009. We should have less risk of hitting bugs at this point because we auto-generate positive CHECK lines only, but this makes things consistent. Copying the original commit msg: "Change tests from "opt %s" to "opt < %s" so that opt doesn't see the input filename so that opt doesn't print the input filename in the output so that grep lines in the tests don't unintentionally match strings in the input filename."
243 lines
8.6 KiB
LLVM
243 lines
8.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; For pattern (X & (signbit l>> Y)) ==/!= 0
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; it may be optimal to fold into (X << Y) >=/< 0
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; Scalar tests
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define i1 @scalar_i8_signbit_lshr_and_eq(i8 %x, i8 %y) {
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; CHECK-LABEL: @scalar_i8_signbit_lshr_and_eq(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i8 -128, [[Y:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[LSHR]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[AND]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%lshr = lshr i8 128, %y
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%and = and i8 %lshr, %x
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%r = icmp eq i8 %and, 0
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ret i1 %r
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}
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define i1 @scalar_i16_signbit_lshr_and_eq(i16 %x, i16 %y) {
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; CHECK-LABEL: @scalar_i16_signbit_lshr_and_eq(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i16 -32768, [[Y:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and i16 [[LSHR]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq i16 [[AND]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%lshr = lshr i16 32768, %y
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%and = and i16 %lshr, %x
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%r = icmp eq i16 %and, 0
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ret i1 %r
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}
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define i1 @scalar_i32_signbit_lshr_and_eq(i32 %x, i32 %y) {
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; CHECK-LABEL: @scalar_i32_signbit_lshr_and_eq(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 -2147483648, [[Y:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[LSHR]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[AND]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%lshr = lshr i32 2147483648, %y
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%and = and i32 %lshr, %x
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%r = icmp eq i32 %and, 0
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ret i1 %r
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}
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define i1 @scalar_i64_signbit_lshr_and_eq(i64 %x, i64 %y) {
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; CHECK-LABEL: @scalar_i64_signbit_lshr_and_eq(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i64 -9223372036854775808, [[Y:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and i64 [[LSHR]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq i64 [[AND]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%lshr = lshr i64 9223372036854775808, %y
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%and = and i64 %lshr, %x
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%r = icmp eq i64 %and, 0
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ret i1 %r
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}
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define i1 @scalar_i32_signbit_lshr_and_ne(i32 %x, i32 %y) {
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; CHECK-LABEL: @scalar_i32_signbit_lshr_and_ne(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 -2147483648, [[Y:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[LSHR]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[AND]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%lshr = lshr i32 2147483648, %y
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%and = and i32 %lshr, %x
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%r = icmp ne i32 %and, 0 ; check 'ne' predicate
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ret i1 %r
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}
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; Vector tests
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define <4 x i1> @vec_4xi32_signbit_lshr_and_eq(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @vec_4xi32_signbit_lshr_and_eq(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr <4 x i32> <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>, [[Y:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and <4 x i32> [[LSHR]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq <4 x i32> [[AND]], zeroinitializer
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; CHECK-NEXT: ret <4 x i1> [[R]]
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;
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%lshr = lshr <4 x i32> <i32 2147483648, i32 2147483648, i32 2147483648, i32 2147483648>, %y
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%and = and <4 x i32> %lshr, %x
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%r = icmp eq <4 x i32> %and, <i32 0, i32 0, i32 0, i32 0>
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ret <4 x i1> %r
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}
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define <4 x i1> @vec_4xi32_signbit_lshr_and_eq_undef1(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @vec_4xi32_signbit_lshr_and_eq_undef1(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr <4 x i32> <i32 -2147483648, i32 undef, i32 -2147483648, i32 2147473648>, [[Y:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and <4 x i32> [[LSHR]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq <4 x i32> [[AND]], zeroinitializer
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; CHECK-NEXT: ret <4 x i1> [[R]]
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;
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%lshr = lshr <4 x i32> <i32 2147483648, i32 undef, i32 2147483648, i32 2147473648>, %y
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%and = and <4 x i32> %lshr, %x
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%r = icmp eq <4 x i32> %and, <i32 0, i32 0, i32 0, i32 0>
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ret <4 x i1> %r
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}
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define <4 x i1> @vec_4xi32_signbit_lshr_and_eq_undef2(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @vec_4xi32_signbit_lshr_and_eq_undef2(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr <4 x i32> <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 2147473648>, [[Y:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and <4 x i32> [[LSHR]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq <4 x i32> [[AND]], <i32 0, i32 0, i32 0, i32 undef>
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; CHECK-NEXT: ret <4 x i1> [[R]]
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;
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%lshr = lshr <4 x i32> <i32 2147483648, i32 2147483648, i32 2147483648, i32 2147473648>, %y
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%and = and <4 x i32> %lshr, %x
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%r = icmp eq <4 x i32> %and, <i32 0, i32 0, i32 0, i32 undef>
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ret <4 x i1> %r
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}
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define <4 x i1> @vec_4xi32_signbit_lshr_and_eq_undef3(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @vec_4xi32_signbit_lshr_and_eq_undef3(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr <4 x i32> <i32 -2147483648, i32 undef, i32 -2147483648, i32 2147473648>, [[Y:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and <4 x i32> [[LSHR]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq <4 x i32> [[AND]], <i32 undef, i32 0, i32 0, i32 0>
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; CHECK-NEXT: ret <4 x i1> [[R]]
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;
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%lshr = lshr <4 x i32> <i32 2147483648, i32 undef, i32 2147483648, i32 2147473648>, %y
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%and = and <4 x i32> %lshr, %x
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%r = icmp eq <4 x i32> %and, <i32 undef, i32 0, i32 0, i32 0>
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ret <4 x i1> %r
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}
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; Extra use
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; Fold happened
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define i1 @scalar_i32_signbit_lshr_and_eq_extra_use_lshr(i32 %x, i32 %y, i32 %z, i32* %p) {
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; CHECK-LABEL: @scalar_i32_signbit_lshr_and_eq_extra_use_lshr(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 -2147483648, [[Y:%.*]]
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; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[LSHR]], [[Z:%.*]]
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; CHECK-NEXT: store i32 [[XOR]], i32* [[P:%.*]], align 4
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[LSHR]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[AND]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%lshr = lshr i32 2147483648, %y
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%xor = xor i32 %lshr, %z ; extra use of lshr
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store i32 %xor, i32* %p
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%and = and i32 %lshr, %x
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%r = icmp eq i32 %and, 0
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ret i1 %r
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}
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; Not fold
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define i1 @scalar_i32_signbit_lshr_and_eq_extra_use_and(i32 %x, i32 %y, i32 %z, i32* %p) {
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; CHECK-LABEL: @scalar_i32_signbit_lshr_and_eq_extra_use_and(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 -2147483648, [[Y:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[LSHR]], [[X:%.*]]
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; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[AND]], [[Z:%.*]]
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; CHECK-NEXT: store i32 [[MUL]], i32* [[P:%.*]], align 4
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; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[AND]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%lshr = lshr i32 2147483648, %y
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%and = and i32 %lshr, %x
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%mul = mul i32 %and, %z ; extra use of and
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store i32 %mul, i32* %p
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%r = icmp eq i32 %and, 0
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ret i1 %r
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}
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; Not fold
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define i1 @scalar_i32_signbit_lshr_and_eq_extra_use_lshr_and(i32 %x, i32 %y, i32 %z, i32* %p, i32* %q) {
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; CHECK-LABEL: @scalar_i32_signbit_lshr_and_eq_extra_use_lshr_and(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 -2147483648, [[Y:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[LSHR]], [[X:%.*]]
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; CHECK-NEXT: store i32 [[AND]], i32* [[P:%.*]], align 4
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LSHR]], [[Z:%.*]]
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; CHECK-NEXT: store i32 [[ADD]], i32* [[Q:%.*]], align 4
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; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[AND]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%lshr = lshr i32 2147483648, %y
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%and = and i32 %lshr, %x
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store i32 %and, i32* %p ; extra use of and
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%add = add i32 %lshr, %z ; extra use of lshr
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store i32 %add, i32* %q
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%r = icmp eq i32 %and, 0
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ret i1 %r
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}
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; X is constant
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define i1 @scalar_i32_signbit_lshr_and_eq_X_is_constant1(i32 %y) {
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; CHECK-LABEL: @scalar_i32_signbit_lshr_and_eq_X_is_constant1(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 -2147483648, [[Y:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[LSHR]], 12345
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; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[AND]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%lshr = lshr i32 2147483648, %y
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%and = and i32 %lshr, 12345
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%r = icmp eq i32 %and, 0
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ret i1 %r
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}
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define i1 @scalar_i32_signbit_lshr_and_eq_X_is_constant2(i32 %y) {
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; CHECK-LABEL: @scalar_i32_signbit_lshr_and_eq_X_is_constant2(
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; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[Y:%.*]], 31
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; CHECK-NEXT: ret i1 [[R]]
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;
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%lshr = lshr i32 2147483648, %y
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%and = and i32 %lshr, 1
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%r = icmp eq i32 %and, 0
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ret i1 %r
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}
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; Negative tests
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; Check 'slt' predicate
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define i1 @scalar_i32_signbit_lshr_and_slt(i32 %x, i32 %y) {
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; CHECK-LABEL: @scalar_i32_signbit_lshr_and_slt(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 -2147483648, [[Y:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[LSHR]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[AND]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%lshr = lshr i32 2147483648, %y
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%and = and i32 %lshr, %x
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%r = icmp slt i32 %and, 0
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ret i1 %r
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}
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; Compare with nonzero
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define i1 @scalar_i32_signbit_lshr_and_eq_nonzero(i32 %x, i32 %y) {
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; CHECK-LABEL: @scalar_i32_signbit_lshr_and_eq_nonzero(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 -2147483648, [[Y:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[LSHR]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[AND]], 1
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; CHECK-NEXT: ret i1 [[R]]
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;
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%lshr = lshr i32 2147483648, %y
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%and = and i32 %lshr, %x
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%r = icmp eq i32 %and, 1 ; should be comparing with 0
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ret i1 %r
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}
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