Roman Lebedev bedf13b1a7 [SimplifyCFG] performBranchToCommonDestFolding(): require block-closed SSA form for bonus instructions (PR51125) ... I can't seem to wrap my head around the proper fix here, we should be fine without this requirement, iff we can form this form, but the naive attempt (https://reviews.llvm.org/D106317) has failed. So just to unblock the release, put up a restriction. Fixes https://bugs.llvm.org/show_bug.cgi?id=51125 (cherry picked from commit 909cba969981032c5740774ca84a34b7f76b909b)		2021-09-10 09:02:26 -07:00
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AArch64
ARM
X86	[SimplifyCFG] performBranchToCommonDestFolding(): require block-closed SSA form for bonus instructions (PR51125)	2021-09-10 09:02:26 -07:00
2010-03-22-empty-baseclass.ll
assume-explosion.ll
basic.ll
bitfield-bittests.ll
d83507-knowledge-retention-bug.ll
expect.ll
gdce.ll
globalaa-retained.ll
inlining-alignment-assumptions.ll	[LLVM IR] Allow volatile stores to trap.	2021-07-26 10:51:00 -07:00
instcombine-sroa-inttoptr.ll
lifetime-sanitizer.ll
loop-rotation-vs-common-code-hoisting.ll
lto-licm.ll
min-max-abs-cse.ll
minmax.ll
openmp-opt-module.ll	[OpenMP] Create custom state machines for generic target regions	2021-07-10 17:57:08 -05:00
partialord-ule.ll
pr32544.ll
pr36760.ll
pr39282.ll
pr44461-br-to-switch-rotate.ll
pr45682.ll
pr45687.ll
PR6627.ll
reassociate-after-unroll.ll
rotate.ll
scev-custom-dl.ll
scev.ll
simplifycfg-options.ll
two-shifts-by-sext.ll
unsigned-multiply-overflow-check.ll
vector-trunc-inseltpoison.ll
vector-trunc.ll