1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 12:12:47 +01:00
llvm-mirror/docs/AMDGPU/gfx10_attr.rst
Dmitry Preobrazhensky 50947152c2 [AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description.
Summary of changes:
- added description of MTBUF instructions and format modifier;
- described limitations of f16 inline constants when used with integer operands;
- updated description of gfx9+ flat global addressing modes;
- v_accvgpr_write_b32 src0 corrections (gfx908);
- minor bugfixing and improvements.
2020-08-21 14:25:14 +03:00

30 lines
891 B
ReStructuredText

..
**************************************************
* *
* Automatically generated file, do not edit! *
* *
**************************************************
.. _amdgpu_synid10_attr:
attr
===========================
Interpolation attribute and channel:
============== ===================================
Syntax Description
============== ===================================
attr{0..32}.x Attribute 0..32 with *x* channel.
attr{0..32}.y Attribute 0..32 with *y* channel.
attr{0..32}.z Attribute 0..32 with *z* channel.
attr{0..32}.w Attribute 0..32 with *w* channel.
============== ===================================
Examples:
.. parsed-literal::
v_interp_p1_f32 v1, v0, attr0.x
v_interp_p1_f32 v1, v0, attr32.w