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7d64810efd
The benchmarking summarized in http://lists.llvm.org/pipermail/llvm-dev/2017-May/113525.html showed this is beneficial for a wide range of cores. As is to be expected, quite a few small adaptations are needed to the regressions tests, as the difference in scheduling results in: - Quite a few small instruction schedule differences. - A few changes in register allocation decisions caused by different instruction schedules. - A few changes in IfConversion decisions, due to a difference in instruction schedule and/or the estimated cost of a branch mispredict. llvm-svn: 306514
32 lines
781 B
LLVM
32 lines
781 B
LLVM
; RUN: llc < %s -mtriple=thumbv7-linux-gnueabihf %s -o - | FileCheck %s
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; Check that new water is created by splitting the basic block after the
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; load instruction. Previously, new water was created before the load
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; instruction, which caused the pass to fail to converge.
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define void @test(i1 %tst) {
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; CHECK-LABEL: test:
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; CHECK: vldr {{s[0-9]+}}, [[CONST:\.LCPI[0-9]+_[0-9]+]]
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; CHECK: b.w [[CONTINUE:\.LBB[0-9]+_[0-9]+]]
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; CHECK: [[CONST]]:
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; CHECK-NEXT: .long
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; CHECK: [[CONTINUE]]:
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entry:
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br i1 %tst, label %true, label %false
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true:
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%val = phi float [12345.0, %entry], [undef, %false]
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call i32 @llvm.arm.space(i32 2000, i32 undef)
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call void @bar(float %val)
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ret void
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false:
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br label %true
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}
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declare void @bar(float)
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declare i32 @llvm.arm.space(i32, i32)
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