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https://github.com/RPCS3/llvm-mirror.git
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ca0f4dc4f0
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. llvm-svn: 209577
71 lines
2.7 KiB
LLVM
71 lines
2.7 KiB
LLVM
; RUN: llc -mcpu=cyclone -debug-only=loop-reduce < %s 2>&1 | FileCheck %s
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; REQUIRES: asserts
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; LSR used to fail here due to a bug in the ReqRegs test.
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; CHECK: The chosen solution requires
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; CHECK-NOT: No Satisfactory Solution
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "arm64-apple-ios"
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define void @do_integer_add(i64 %iterations, i8* nocapture readonly %cookie) {
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entry:
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%N = bitcast i8* %cookie to i32*
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%0 = load i32* %N, align 4
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%add = add nsw i32 %0, 57
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%cmp56 = icmp eq i64 %iterations, 0
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br i1 %cmp56, label %while.end, label %for.cond.preheader.preheader
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for.cond.preheader.preheader: ; preds = %entry
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br label %for.cond.preheader
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while.cond.loopexit: ; preds = %for.body
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%add21.lcssa = phi i32 [ %add21, %for.body ]
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%dec58 = add i64 %dec58.in, -1
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%cmp = icmp eq i64 %dec58, 0
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br i1 %cmp, label %while.end.loopexit, label %for.cond.preheader
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for.cond.preheader: ; preds = %for.cond.preheader.preheader, %while.cond.loopexit
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%dec58.in = phi i64 [ %dec58, %while.cond.loopexit ], [ %iterations, %for.cond.preheader.preheader ]
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%a.057 = phi i32 [ %add21.lcssa, %while.cond.loopexit ], [ %add, %for.cond.preheader.preheader ]
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br label %for.body
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for.body: ; preds = %for.body, %for.cond.preheader
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%a.154 = phi i32 [ %a.057, %for.cond.preheader ], [ %add21, %for.body ]
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%i.053 = phi i32 [ 1, %for.cond.preheader ], [ %inc, %for.body ]
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%inc = add nsw i32 %i.053, 1
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%add2 = shl i32 %a.154, 1
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%add3 = add nsw i32 %add2, %i.053
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%add4 = shl i32 %add3, 1
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%add5 = add nsw i32 %add4, %i.053
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%add6 = shl i32 %add5, 1
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%add7 = add nsw i32 %add6, %i.053
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%add8 = shl i32 %add7, 1
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%add9 = add nsw i32 %add8, %i.053
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%add10 = shl i32 %add9, 1
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%add11 = add nsw i32 %add10, %i.053
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%add12 = shl i32 %add11, 1
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%add13 = add nsw i32 %add12, %i.053
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%add14 = shl i32 %add13, 1
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%add15 = add nsw i32 %add14, %i.053
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%add16 = shl i32 %add15, 1
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%add17 = add nsw i32 %add16, %i.053
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%add18 = shl i32 %add17, 1
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%add19 = add nsw i32 %add18, %i.053
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%add20 = shl i32 %add19, 1
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%add21 = add nsw i32 %add20, %i.053
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%exitcond = icmp eq i32 %inc, 1001
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br i1 %exitcond, label %while.cond.loopexit, label %for.body
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while.end.loopexit: ; preds = %while.cond.loopexit
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%add21.lcssa.lcssa = phi i32 [ %add21.lcssa, %while.cond.loopexit ]
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br label %while.end
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while.end: ; preds = %while.end.loopexit, %entry
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%a.0.lcssa = phi i32 [ %add, %entry ], [ %add21.lcssa.lcssa, %while.end.loopexit ]
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tail call void @use_int(i32 %a.0.lcssa)
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ret void
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}
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declare void @use_int(i32)
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