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e01dc73ad2
All these headers already depend on CodeGen headers so moving them into CodeGen fixes the layering (since CodeGen depends on Target, not the other way around). llvm-svn: 318490
67 lines
2.6 KiB
C++
67 lines
2.6 KiB
C++
//===- ThumbRegisterInfo.h - Thumb Register Information Impl -*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Thumb implementation of the TargetRegisterInfo
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// class. With the exception of emitLoadConstPool Thumb2 tracks
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// ARMBaseRegisterInfo, Thumb1 overloads the functions below.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_ARM_THUMB1REGISTERINFO_H
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#define LLVM_LIB_TARGET_ARM_THUMB1REGISTERINFO_H
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#include "ARMBaseRegisterInfo.h"
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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namespace llvm {
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class ARMSubtarget;
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class ARMBaseInstrInfo;
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struct ThumbRegisterInfo : public ARMBaseRegisterInfo {
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public:
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ThumbRegisterInfo();
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const TargetRegisterClass *
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getLargestLegalSuperClass(const TargetRegisterClass *RC,
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const MachineFunction &MF) const override;
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const TargetRegisterClass *
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getPointerRegClass(const MachineFunction &MF,
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unsigned Kind = 0) const override;
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/// emitLoadConstPool - Emits a load from constpool to materialize the
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/// specified immediate.
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void
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emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
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const DebugLoc &dl, unsigned DestReg, unsigned SubIdx,
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int Val, ARMCC::CondCodes Pred = ARMCC::AL,
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unsigned PredReg = 0,
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unsigned MIFlags = MachineInstr::NoFlags) const override;
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// rewrite MI to access 'Offset' bytes from the FP. Update Offset to be
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// however much remains to be handled. Return 'true' if no further
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// work is required.
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bool rewriteFrameIndex(MachineBasicBlock::iterator II, unsigned FrameRegIdx,
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unsigned FrameReg, int &Offset,
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const ARMBaseInstrInfo &TII) const;
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void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
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int64_t Offset) const override;
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bool saveScavengerRegister(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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MachineBasicBlock::iterator &UseMI,
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const TargetRegisterClass *RC,
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unsigned Reg) const override;
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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int SPAdj, unsigned FIOperandNum,
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RegScavenger *RS = nullptr) const override;
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};
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}
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#endif
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