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992d1824c2
This patch adds a TileInfo abstraction and utilities to create a 3-level loop nest for tiling. Reviewers: anemet Reviewed By: anemet Differential Revision: https://reviews.llvm.org/D77550
105 lines
4.1 KiB
C++
105 lines
4.1 KiB
C++
//===- MatrixUtils.cpp - Utilities to lower matrix intrinsics ---*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// Utilities for generating tiled loops for matrix operations.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Transforms/Utils/MatrixUtils.h"
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#include "llvm/Analysis/DomTreeUpdater.h"
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#include "llvm/Analysis/LoopInfo.h"
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#include "llvm/IR/BasicBlock.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/Type.h"
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using namespace llvm;
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BasicBlock *TileInfo::CreateLoop(BasicBlock *Preheader, BasicBlock *Exit,
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Value *Bound, Value *Step, StringRef Name,
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IRBuilderBase &B, DomTreeUpdater &DTU, Loop *L,
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LoopInfo &LI) {
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LLVMContext &Ctx = Preheader->getContext();
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BasicBlock *Header = BasicBlock::Create(
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Preheader->getContext(), Name + ".header", Preheader->getParent(), Exit);
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BasicBlock *Body = BasicBlock::Create(Header->getContext(), Name + ".body",
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Header->getParent(), Exit);
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BasicBlock *Latch = BasicBlock::Create(Header->getContext(), Name + ".latch",
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Header->getParent(), Exit);
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Type *I32Ty = Type::getInt64Ty(Ctx);
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BranchInst::Create(Body, Header);
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BranchInst::Create(Latch, Body);
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PHINode *IV =
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PHINode::Create(I32Ty, 2, Name + ".iv", Header->getTerminator());
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IV->addIncoming(ConstantInt::get(I32Ty, 0), Preheader);
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B.SetInsertPoint(Latch);
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Value *Inc = B.CreateAdd(IV, Step, Name + ".step");
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Value *Cond = B.CreateICmpNE(Inc, Bound, Name + ".cond");
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BranchInst::Create(Header, Exit, Cond, Latch);
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IV->addIncoming(Inc, Latch);
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BranchInst *PreheaderBr = cast<BranchInst>(Preheader->getTerminator());
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BasicBlock *Tmp = PreheaderBr->getSuccessor(0);
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PreheaderBr->setSuccessor(0, Header);
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DTU.applyUpdatesPermissive({
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{DominatorTree::Delete, Preheader, Tmp},
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{DominatorTree::Insert, Header, Body},
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{DominatorTree::Insert, Body, Latch},
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{DominatorTree::Insert, Latch, Header},
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{DominatorTree::Insert, Latch, Exit},
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{DominatorTree::Insert, Preheader, Header},
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});
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L->addBasicBlockToLoop(Header, LI);
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L->addBasicBlockToLoop(Body, LI);
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L->addBasicBlockToLoop(Latch, LI);
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return Body;
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}
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// Creates the following loop nest skeleton:
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// for C = 0; C < NumColumns; C += TileSize
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// for R = 0; R < NumRows; R += TileSize
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// for K = 0; K < Inner ; K += TileSize
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BasicBlock *TileInfo::CreateTiledLoops(BasicBlock *Start, BasicBlock *End,
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IRBuilderBase &B, DomTreeUpdater &DTU,
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LoopInfo &LI) {
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Loop *ColLoop = LI.AllocateLoop();
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Loop *RowLoop = LI.AllocateLoop();
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Loop *InnerLoop = LI.AllocateLoop();
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RowLoop->addChildLoop(InnerLoop);
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ColLoop->addChildLoop(RowLoop);
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if (Loop *ParentL = LI.getLoopFor(Start))
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ParentL->addChildLoop(ColLoop);
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else
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LI.addTopLevelLoop(ColLoop);
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BasicBlock *ColBody =
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CreateLoop(Start, End, B.getInt64(NumColumns), B.getInt64(TileSize),
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"cols", B, DTU, ColLoop, LI);
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BasicBlock *ColLatch = ColBody->getSingleSuccessor();
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BasicBlock *RowBody =
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CreateLoop(ColBody, ColLatch, B.getInt64(NumRows), B.getInt64(TileSize),
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"rows", B, DTU, RowLoop, LI);
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RowLoopLatch = RowBody->getSingleSuccessor();
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BasicBlock *InnerBody =
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CreateLoop(RowBody, RowLoopLatch, B.getInt64(NumInner),
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B.getInt64(TileSize), "inner", B, DTU, InnerLoop, LI);
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InnerLoopLatch = InnerBody->getSingleSuccessor();
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ColumnLoopHeader = ColBody->getSinglePredecessor();
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RowLoopHeader = RowBody->getSinglePredecessor();
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InnerLoopHeader = InnerBody->getSinglePredecessor();
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CurrentRow = &*RowLoopHeader->begin();
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CurrentCol = &*ColumnLoopHeader->begin();
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CurrentK = &*InnerLoopHeader->begin();
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return InnerBody;
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}
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