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Oliver Stannard c00402ed88 Fix and test inter-procedural register allocation for ARM
- Avoid a crash when IPRA calls ARMFrameLowering::determineCalleeSaves
  with a null RegScavenger. Simply not updating the register scavenger
  is fine because IPRA only cares about the SavedRegs vector, the acutal
  code of the function has already been generated at this point.
- Add a new hook to TargetRegisterInfo to get the set of registers which
  can be clobbered inside a call, even if the compiler can see both
  sides, by linker-generated code.

Differential revision: https://reviews.llvm.org/D64908

llvm-svn: 367669
2019-08-02 10:23:05 +00:00
..
llvm Fix and test inter-procedural register allocation for ARM 2019-08-02 10:23:05 +00:00
llvm-c [LLVM-C] Improve Bindings to The Internalize Pass 2019-07-23 04:56:44 +00:00