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c00cb13f9c
This patch removes the PROC macro in favor of CPUKind enum and a table that contains information about CPUs. The current information in the table is the CPU name, CPUKind enum value, key feature for target multiversioning, and Is64Bit capable. For the strings that are aliases, I've duplicated the information in the table. This means there are more rows in the table than CPUKind enums. This replaces multiple StringSwitch's with loops through the table. They are linear searches due to the table being more logically ordered than alphabetical. The StringSwitch's would have also been linear. I've used StringLiteral on the strings in the table so we can quickly check the length while searching. I contemplated having a CPUKind for each string so there was a 1:1 mapping, but didn't want to spread more names to the places that use the enum. My ultimate goal here is to store the features for each CPU as a bitset within the table. Hoping to use constexpr to make this composable so we can group features and inherit them. After the table lookup we can turn the bitset into a list of strings for the frontend. The current switch we have for selecting features for CPUs has become difficult to maintain while trying to express inheritance relationships. Differential Revision: https://reviews.llvm.org/D82414
141 lines
3.1 KiB
C++
141 lines
3.1 KiB
C++
//===-- X86TargetParser - Parser for X86 features ---------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a target parser to recognise X86 hardware features.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_SUPPORT_X86TARGETPARSERCOMMON_H
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#define LLVM_SUPPORT_X86TARGETPARSERCOMMON_H
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#include "llvm/ADT/SmallVector.h"
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namespace llvm {
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class StringRef;
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namespace X86 {
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// This should be kept in sync with libcc/compiler-rt as its included by clang
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// as a proxy for what's in libgcc/compiler-rt.
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enum ProcessorVendors : unsigned {
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VENDOR_DUMMY,
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#define X86_VENDOR(ENUM, STRING) \
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ENUM,
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#include "llvm/Support/X86TargetParser.def"
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VENDOR_OTHER
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};
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// This should be kept in sync with libcc/compiler-rt as its included by clang
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// as a proxy for what's in libgcc/compiler-rt.
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enum ProcessorTypes : unsigned {
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CPU_TYPE_DUMMY,
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#define X86_CPU_TYPE(ARCHNAME, ENUM) \
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ENUM,
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#include "llvm/Support/X86TargetParser.def"
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CPU_TYPE_MAX
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};
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// This should be kept in sync with libcc/compiler-rt as its included by clang
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// as a proxy for what's in libgcc/compiler-rt.
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enum ProcessorSubtypes : unsigned {
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CPU_SUBTYPE_DUMMY,
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#define X86_CPU_SUBTYPE(ARCHNAME, ENUM) \
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ENUM,
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#include "llvm/Support/X86TargetParser.def"
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CPU_SUBTYPE_MAX
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};
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// This should be kept in sync with libcc/compiler-rt as it should be used
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// by clang as a proxy for what's in libgcc/compiler-rt.
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enum ProcessorFeatures {
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#define X86_FEATURE(ENUM) \
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ENUM,
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#include "llvm/Support/X86TargetParser.def"
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CPU_FEATURE_MAX
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};
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enum CPUKind {
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CK_None,
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CK_i386,
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CK_i486,
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CK_WinChipC6,
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CK_WinChip2,
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CK_C3,
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CK_i586,
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CK_Pentium,
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CK_PentiumMMX,
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CK_PentiumPro,
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CK_i686,
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CK_Pentium2,
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CK_Pentium3,
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CK_PentiumM,
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CK_C3_2,
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CK_Yonah,
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CK_Pentium4,
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CK_Prescott,
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CK_Nocona,
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CK_Core2,
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CK_Penryn,
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CK_Bonnell,
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CK_Silvermont,
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CK_Goldmont,
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CK_GoldmontPlus,
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CK_Tremont,
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CK_Nehalem,
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CK_Westmere,
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CK_SandyBridge,
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CK_IvyBridge,
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CK_Haswell,
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CK_Broadwell,
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CK_SkylakeClient,
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CK_SkylakeServer,
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CK_Cascadelake,
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CK_Cooperlake,
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CK_Cannonlake,
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CK_IcelakeClient,
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CK_IcelakeServer,
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CK_Tigerlake,
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CK_KNL,
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CK_KNM,
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CK_Lakemont,
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CK_K6,
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CK_K6_2,
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CK_K6_3,
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CK_Athlon,
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CK_AthlonXP,
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CK_K8,
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CK_K8SSE3,
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CK_AMDFAM10,
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CK_BTVER1,
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CK_BTVER2,
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CK_BDVER1,
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CK_BDVER2,
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CK_BDVER3,
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CK_BDVER4,
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CK_ZNVER1,
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CK_ZNVER2,
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CK_x86_64,
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CK_Geode,
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};
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/// Parse \p CPU string into a CPUKind. Will only accept 64-bit capable CPUs if
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/// \p Only64Bit is true.
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CPUKind parseArchX86(StringRef CPU, bool Only64Bit = false);
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/// Provide a list of valid CPU names. If \p Only64Bit is true, the list will
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/// only contain 64-bit capable CPUs.
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void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values,
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bool ArchIs32Bit);
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ProcessorFeatures getKeyFeature(CPUKind Kind);
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} // namespace X86
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} // namespace llvm
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#endif
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