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b9807cdcf1
llc using the host cpu features and *waning* on unknown features is probably not a good thing :-( llvm-svn: 189144
33 lines
994 B
LLVM
33 lines
994 B
LLVM
; RUN: llc < %s -march=x86 -mattr=sse4.1 -mcpu=nehalem -stack-alignment=16 > %t
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; RUN: grep pmul %t | count 12
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; RUN: grep mov %t | count 11
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define <4 x i32> @a(<4 x i32> %i) nounwind {
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%A = mul <4 x i32> %i, < i32 117, i32 117, i32 117, i32 117 >
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ret <4 x i32> %A
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}
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define <2 x i64> @b(<2 x i64> %i) nounwind {
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%A = mul <2 x i64> %i, < i64 117, i64 117 >
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ret <2 x i64> %A
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}
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define <4 x i32> @c(<4 x i32> %i, <4 x i32> %j) nounwind {
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%A = mul <4 x i32> %i, %j
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ret <4 x i32> %A
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}
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define <2 x i64> @d(<2 x i64> %i, <2 x i64> %j) nounwind {
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%A = mul <2 x i64> %i, %j
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ret <2 x i64> %A
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}
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; Use a call to force spills.
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declare void @foo()
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define <4 x i32> @e(<4 x i32> %i, <4 x i32> %j) nounwind {
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call void @foo()
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%A = mul <4 x i32> %i, %j
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ret <4 x i32> %A
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}
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define <2 x i64> @f(<2 x i64> %i, <2 x i64> %j) nounwind {
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call void @foo()
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%A = mul <2 x i64> %i, %j
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ret <2 x i64> %A
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}
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