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f82b3e73a6
NaCl's sandbox doesn't allow PUSHF/POPF out of security concerns (priviledged emulators have forgotten to mask system bits in the past, and EFLAGS's DF bit is a constant source of hilarity). Commit r220529 fixed PR20376 by saving cmpxchg's flags result using EFLAGS, this commit now generated LAHF/SAHF instead, for all of x86 (not just NaCl) because it leads to an overall performance gain over PUSHF/POPF. As with the previous patch this code generation is pretty bad because it occurs very later, after register allocation, and in many cases it rematerializes flags which were already available (e.g. already in a register through SETE). Fortunately it's somewhat rare that this code needs to fire. I did [[ https://github.com/jfbastien/benchmark-x86-flags | a bit of benchmarking ]], the results on an Intel Haswell E5-2690 CPU at 2.9GHz are: | Time per call (ms) | Runtime (ms) | Benchmark | | 0.000012514 | 6257 | sete.i386 | | 0.000012810 | 6405 | sete.i386-fast | | 0.000010456 | 5228 | sete.x86-64 | | 0.000010496 | 5248 | sete.x86-64-fast | | 0.000012906 | 6453 | lahf-sahf.i386 | | 0.000013236 | 6618 | lahf-sahf.i386-fast | | 0.000010580 | 5290 | lahf-sahf.x86-64 | | 0.000010304 | 5152 | lahf-sahf.x86-64-fast | | 0.000028056 | 14028 | pushf-popf.i386 | | 0.000027160 | 13580 | pushf-popf.i386-fast | | 0.000023810 | 11905 | pushf-popf.x86-64 | | 0.000026468 | 13234 | pushf-popf.x86-64-fast | Clearly `PUSHF`/`POPF` are suboptimal. It doesn't really seems to be worth teaching LLVM about individual flags, at least not for this purpose. Reviewers: rnk, jvoung, t.p.northover Subscribers: llvm-commits Differential revision: http://reviews.llvm.org/D6629 llvm-svn: 244503
156 lines
4.1 KiB
LLVM
156 lines
4.1 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=i386-linux-gnu %s -o - | FileCheck %s -check-prefix=i386
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; RUN: llc -verify-machineinstrs -mtriple=i386-linux-gnu -pre-RA-sched=fast %s -o - | FileCheck %s -check-prefix=i386f
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; RUN: llc -verify-machineinstrs -mtriple=x86_64-linux-gnu %s -o - | FileCheck %s -check-prefix=x8664
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; RUN: llc -verify-machineinstrs -mtriple=x86_64-linux-gnu -pre-RA-sched=fast %s -o - | FileCheck %s -check-prefix=x8664
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declare i32 @foo()
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declare i32 @bar(i64)
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define i64 @test_intervening_call(i64* %foo, i64 %bar, i64 %baz) {
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; i386-LABEL: test_intervening_call:
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; i386: cmpxchg8b
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; i386-NEXT: pushl %eax
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; i386-NEXT: seto %al
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; i386-NEXT: lahf
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; i386-NEXT: movl %eax, [[FLAGS:%.*]]
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; i386-NEXT: popl %eax
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; i386-NEXT: movl %edx, 4(%esp)
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; i386-NEXT: movl %eax, (%esp)
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; i386-NEXT: calll bar
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; i386-NEXT: movl [[FLAGS]], %eax
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; i386-NEXT: addb $127, %al
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; i386-NEXT: sahf
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; i386-NEXT: jne
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; i386f-LABEL: test_intervening_call:
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; i386f: cmpxchg8b
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; i386f-NEXT: movl %eax, (%esp)
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; i386f-NEXT: movl %edx, 4(%esp)
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; i386f-NEXT: seto %al
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; i386f-NEXT: lahf
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; i386f-NEXT: movl %eax, [[FLAGS:%.*]]
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; i386f-NEXT: calll bar
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; i386f-NEXT: movl [[FLAGS]], %eax
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; i386f-NEXT: addb $127, %al
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; i386f-NEXT: sahf
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; i386f-NEXT: jne
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; x8664-LABEL: test_intervening_call:
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; x8664: cmpxchgq
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; x8664: pushq %rax
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; x8664-NEXT: seto %al
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; x8664-NEXT: lahf
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; x8664-NEXT: movq %rax, [[FLAGS:%.*]]
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; x8664-NEXT: popq %rax
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; x8664-NEXT: movq %rax, %rdi
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; x8664-NEXT: callq bar
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; x8664-NEXT: movq [[FLAGS]], %rax
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; x8664-NEXT: addb $127, %al
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; x8664-NEXT: sahf
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; x8664-NEXT: jne
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%cx = cmpxchg i64* %foo, i64 %bar, i64 %baz seq_cst seq_cst
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%v = extractvalue { i64, i1 } %cx, 0
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%p = extractvalue { i64, i1 } %cx, 1
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call i32 @bar(i64 %v)
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br i1 %p, label %t, label %f
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t:
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ret i64 42
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f:
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ret i64 0
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}
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; Interesting in producing a clobber without any function calls.
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define i32 @test_control_flow(i32* %p, i32 %i, i32 %j) {
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; i386-LABEL: test_control_flow:
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; i386: cmpxchg
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; i386-NEXT: jne
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; i386f-LABEL: test_control_flow:
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; i386f: cmpxchg
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; i386f-NEXT: jne
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; x8664-LABEL: test_control_flow:
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; x8664: cmpxchg
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; x8664-NEXT: jne
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entry:
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%cmp = icmp sgt i32 %i, %j
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br i1 %cmp, label %loop_start, label %cond.end
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loop_start:
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br label %while.condthread-pre-split.i
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while.condthread-pre-split.i:
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%.pr.i = load i32, i32* %p, align 4
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br label %while.cond.i
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while.cond.i:
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%0 = phi i32 [ %.pr.i, %while.condthread-pre-split.i ], [ 0, %while.cond.i ]
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%tobool.i = icmp eq i32 %0, 0
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br i1 %tobool.i, label %while.cond.i, label %while.body.i
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while.body.i:
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%.lcssa = phi i32 [ %0, %while.cond.i ]
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%1 = cmpxchg i32* %p, i32 %.lcssa, i32 %.lcssa seq_cst seq_cst
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%2 = extractvalue { i32, i1 } %1, 1
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br i1 %2, label %cond.end.loopexit, label %while.condthread-pre-split.i
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cond.end.loopexit:
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br label %cond.end
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cond.end:
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%cond = phi i32 [ %i, %entry ], [ 0, %cond.end.loopexit ]
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ret i32 %cond
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}
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; This one is an interesting case because CMOV doesn't have a chain
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; operand. Naive attempts to limit cmpxchg EFLAGS use are likely to fail here.
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define i32 @test_feed_cmov(i32* %addr, i32 %desired, i32 %new) {
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; i386-LABEL: test_feed_cmov:
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; i386: cmpxchgl
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; i386-NEXT: seto %al
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; i386-NEXT: lahf
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; i386-NEXT: movl %eax, [[FLAGS:%.*]]
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; i386-NEXT: calll foo
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; i386-NEXT: pushl %eax
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; i386-NEXT: movl [[FLAGS]], %eax
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; i386-NEXT: addb $127, %al
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; i386-NEXT: sahf
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; i386-NEXT: popl %eax
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; i386f-LABEL: test_feed_cmov:
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; i386f: cmpxchgl
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; i386f-NEXT: seto %al
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; i386f-NEXT: lahf
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; i386f-NEXT: movl %eax, [[FLAGS:%.*]]
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; i386f-NEXT: calll foo
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; i386f-NEXT: pushl %eax
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; i386f-NEXT: movl [[FLAGS]], %eax
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; i386f-NEXT: addb $127, %al
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; i386f-NEXT: sahf
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; i386f-NEXT: popl %eax
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; x8664-LABEL: test_feed_cmov:
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; x8664: cmpxchgl
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; x8664: seto %al
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; x8664-NEXT: lahf
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; x8664-NEXT: movq %rax, [[FLAGS:%.*]]
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; x8664-NEXT: callq foo
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; x8664-NEXT: pushq %rax
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; x8664-NEXT: movq [[FLAGS]], %rax
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; x8664-NEXT: addb $127, %al
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; x8664-NEXT: sahf
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; x8664-NEXT: popq %rax
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%res = cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst
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%success = extractvalue { i32, i1 } %res, 1
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%rhs = call i32 @foo()
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%ret = select i1 %success, i32 %new, i32 %rhs
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ret i32 %ret
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}
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