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5538ea11d7
[Reapplying r284580 and r285917 with fix and testing to ensure emitted jump tables for Thumb-1 have 4-byte alignment] The TBB and TBH instructions in Thumb-2 allow jump tables to be compressed into sequences of bytes or shorts respectively. These instructions do not exist in Thumb-1, however it is possible to synthesize them out of a sequence of other instructions. It turns out this sequence is so short that it's almost never a lose for performance and is ALWAYS a significant win for code size. TBB example: Before: lsls r0, r0, #2 After: add r0, pc adr r1, .LJTI0_0 ldrb r0, [r0, #6] ldr r0, [r0, r1] lsls r0, r0, #1 mov pc, r0 add pc, r0 => No change in prologue code size or dynamic instruction count. Jump table shrunk by a factor of 4. The only case that can increase dynamic instruction count is the TBH case: Before: lsls r0, r4, #2 After: lsls r4, r4, #1 adr r1, .LJTI0_0 add r4, pc ldr r0, [r0, r1] ldrh r4, [r4, #6] mov pc, r0 lsls r4, r4, #1 add pc, r4 => 1 more instruction in prologue. Jump table shrunk by a factor of 2. So there is an argument that this should be disabled when optimizing for performance (and a TBH needs to be generated). I'm not so sure about that in practice, because on small cores with Thumb-1 performance is often tied to code size. But I'm willing to turn it off when optimizing for performance if people want (also note that TBHs are fairly rare in practice!) llvm-svn: 285690
69 lines
1.7 KiB
LLVM
69 lines
1.7 KiB
LLVM
; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
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; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic | FileCheck %s
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; RUN: llc < %s -mtriple=thumbv6m-apple-darwin -relocation-model=static | FileCheck %s --check-prefix=THUMB1
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; RUN: llc < %s -mtriple=thumbv6m-apple-darwin -relocation-model=pic | FileCheck %s --check-prefix=THUMB1
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define void @bar(i32 %n.u) {
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entry:
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; CHECK-LABEL: bar:
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; CHECK: tbb
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; CHECK: .data_region jt8
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; CHECK: .end_data_region
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; CHECK-NEXT: .p2align 1
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; THUMB1-LABEL: bar:
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; THUMB1: add pc, r0
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; THUMB1: .data_region jt8
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; THUMB1: .byte (LBB0_3-(LCPI0_0+4))/2
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; THUMB1: .end_data_region
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; THUMB1-NEXT: .p2align 1
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switch i32 %n.u, label %bb12 [i32 1, label %bb i32 2, label %bb6 i32 4, label %bb7 i32 5, label %bb8 i32 6, label %bb10 i32 7, label %bb1 i32 8, label %bb3 i32 9, label %bb4 i32 10, label %bb9 i32 11, label %bb2 i32 12, label %bb5 i32 13, label %bb11 ]
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bb:
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tail call void(...) @foo1()
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ret void
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bb1:
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tail call void(...) @foo2()
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ret void
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bb2:
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tail call void(...) @foo6()
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ret void
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bb3:
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tail call void(...) @foo3()
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ret void
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bb4:
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tail call void(...) @foo4()
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ret void
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bb5:
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tail call void(...) @foo5()
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ret void
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bb6:
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tail call void(...) @foo1()
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ret void
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bb7:
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tail call void(...) @foo2()
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ret void
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bb8:
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tail call void(...) @foo6()
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ret void
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bb9:
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tail call void(...) @foo3()
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ret void
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bb10:
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tail call void(...) @foo4()
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ret void
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bb11:
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tail call void(...) @foo5()
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ret void
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bb12:
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tail call void(...) @foo6()
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ret void
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}
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declare void @foo1(...)
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declare void @foo2(...)
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declare void @foo6(...)
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declare void @foo3(...)
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declare void @foo4(...)
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declare void @foo5(...)
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