Eric Christopher c09e31fc3e Add a warning if someone attempts to add extra section flags to sections ... with well defined semantics like .rodata. llvm-svn: 335558		2018-06-25 23:53:54 +00:00
..
AArch64	Revert r334980 and 334983	2018-06-20 00:02:32 +00:00
AMDGPU	[AMDGPU] Fix lit failures introduced in r335281	2018-06-21 22:30:09 +00:00
ARM	Recommit of r335326, with the test fixed that I missed.	2018-06-22 10:03:03 +00:00
AsmParser	[MC] Add assembler support for .cg_profile.	2018-06-02 16:33:01 +00:00
AVR	[AVR] Implement some missing code paths	2017-12-11 11:01:27 +00:00
BPF	bpf: New disassembler testcases for 32-bit subregister support	2018-02-23 23:49:35 +00:00
COFF	[CodeView] Add prefix to CodeView registers.	2018-05-29 14:35:34 +00:00
Disassembler	[PowerPC] Fix incorrectly encoded wait instruction	2018-06-25 19:28:27 +00:00
ELF	Add a warning if someone attempts to add extra section flags to sections	2018-06-25 23:53:54 +00:00
Hexagon	[Hexagon] Fix the value of HexagonII::TypeCVI_FIRST	2018-06-19 18:09:54 +00:00
Lanai
MachO	[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.	2018-05-09 02:40:45 +00:00
Mips	[mips] Correct predicates for loads, bit manipulation instructions and some pseudos	2018-06-20 19:59:58 +00:00
PowerPC	[PowerPC] Fix incorrectly encoded wait instruction	2018-06-25 19:28:27 +00:00
RISCV	[RISCV] Tail calls don't need to save return address	2018-06-21 14:37:09 +00:00
Sparc	[Sparc] Add support for 13-bit PIC	2018-06-11 05:50:08 +00:00
SystemZ
WebAssembly	[WebAssembly] Ignore explicit section names for functions	2018-06-14 18:48:19 +00:00
X86	[X86] Allow base and index for gather instructions to appear in other order for Intel syntax.	2018-06-25 17:26:51 +00:00