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7ee758d987
series of identical commands, handle them all with one switch. In the case of the x86 at&t asm printer, only 3 switches are needed for all instructions. llvm-svn: 29184
51 lines
1.7 KiB
C++
51 lines
1.7 KiB
C++
//===- AsmWriterEmitter.h - Generate an assembly writer ---------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This tablegen backend is responsible for emitting an assembly printer for the
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// code generator.
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//
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//===----------------------------------------------------------------------===//
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#ifndef ASMWRITER_EMITTER_H
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#define ASMWRITER_EMITTER_H
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#include "TableGenBackend.h"
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#include <map>
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#include <vector>
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#include <cassert>
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namespace llvm {
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class AsmWriterInst;
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class CodeGenInstruction;
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class AsmWriterEmitter : public TableGenBackend {
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RecordKeeper &Records;
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std::map<const CodeGenInstruction*, AsmWriterInst*> CGIAWIMap;
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std::vector<const CodeGenInstruction*> NumberedInstructions;
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public:
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AsmWriterEmitter(RecordKeeper &R) : Records(R) {}
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// run - Output the asmwriter, returning true on failure.
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void run(std::ostream &o);
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private:
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AsmWriterInst *getAsmWriterInstByID(unsigned ID) const {
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assert(ID < NumberedInstructions.size());
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std::map<const CodeGenInstruction*, AsmWriterInst*>::const_iterator I =
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CGIAWIMap.find(NumberedInstructions[ID]);
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assert(I != CGIAWIMap.end() && "Didn't find inst!");
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return I->second;
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}
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void FindUniqueOperandCommands(std::vector<std::string> &UOC,
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std::vector<unsigned> &InstIdxs,
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std::vector<unsigned> &InstOpsUsed) const;
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};
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}
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#endif
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