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llvm-mirror/test/tools/llvm-mca
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Andrew Savonichev 182b0cd903 [MCA] Disable RCU for InOrderIssueStage 
This is a follow-up for:
D98604 [MCA] Ensure that writes occur in-order

When instructions are aligned by the order of writes, they retire
in-order naturally. There is no need for an RCU, so it is disabled.

Differential Revision: https://reviews.llvm.org/D98628
2021-03-24 13:54:04 +03:00
..
AArch64 [MCA] Disable RCU for InOrderIssueStage 2021-03-24 13:54:04 +03:00
AMDGPU [MCA] Disable RCU for InOrderIssueStage 2021-03-24 13:54:04 +03:00
ARM [MCA] Disable RCU for InOrderIssueStage 2021-03-24 13:54:04 +03:00
JSON/X86 [llvm-mca] Adding local lit config file for X86 targets 2021-01-22 09:52:57 -08:00
SystemZ
X86 [MCA] Improved handling of negative read-advance cycles. 2021-03-23 14:47:23 +00:00
invalid_input_file_name.test [test] Use host platform specific error message substitution in lit tests 2021-01-29 07:16:30 -05:00
lit.local.cfg