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906a17fb34
(icmp eq (ashr C1, %V) -1) may have multiple answers if C1 is not a power of two and has the sign bit set. This fixes PR24873. llvm-svn: 248074
388 lines
8.9 KiB
LLVM
388 lines
8.9 KiB
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-p:64:64:64-p1:16:16:16-p2:32:32:32-p3:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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; CHECK-LABEL: @lshr_eq_msb_low_last_zero
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; CHECK-NEXT: icmp ugt i8 %a, 6
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define i1 @lshr_eq_msb_low_last_zero(i8 %a) {
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%shr = lshr i8 127, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_eq_msb_low_second_zero
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; CHECK-NEXT: icmp ugt i8 %a, 6
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define i1 @ashr_eq_msb_low_second_zero(i8 %a) {
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%shr = ashr i8 127, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @lshr_ne_msb_low_last_zero
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; CHECK-NEXT: icmp ult i8 %a, 7
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define i1 @lshr_ne_msb_low_last_zero(i8 %a) {
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%shr = lshr i8 127, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_ne_msb_low_second_zero
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; CHECK-NEXT: icmp ult i8 %a, 7
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define i1 @ashr_ne_msb_low_second_zero(i8 %a) {
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%shr = ashr i8 127, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_eq_both_equal
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; CHECK-NEXT: icmp eq i8 %a, 0
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define i1 @ashr_eq_both_equal(i8 %a) {
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%shr = ashr i8 128, %a
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%cmp = icmp eq i8 %shr, 128
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_ne_both_equal
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; CHECK-NEXT: icmp ne i8 %a, 0
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define i1 @ashr_ne_both_equal(i8 %a) {
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%shr = ashr i8 128, %a
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%cmp = icmp ne i8 %shr, 128
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ret i1 %cmp
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}
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; CHECK-LABEL: @lshr_eq_both_equal
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; CHECK-NEXT: icmp eq i8 %a, 0
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define i1 @lshr_eq_both_equal(i8 %a) {
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%shr = lshr i8 127, %a
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%cmp = icmp eq i8 %shr, 127
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ret i1 %cmp
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}
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; CHECK-LABEL: @lshr_ne_both_equal
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; CHECK-NEXT: icmp ne i8 %a, 0
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define i1 @lshr_ne_both_equal(i8 %a) {
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%shr = lshr i8 127, %a
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%cmp = icmp ne i8 %shr, 127
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_eq_both_equal
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; CHECK-NEXT: icmp eq i8 %a, 0
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define i1 @exact_ashr_eq_both_equal(i8 %a) {
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%shr = ashr exact i8 128, %a
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%cmp = icmp eq i8 %shr, 128
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_ne_both_equal
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; CHECK-NEXT: icmp ne i8 %a, 0
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define i1 @exact_ashr_ne_both_equal(i8 %a) {
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%shr = ashr exact i8 128, %a
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%cmp = icmp ne i8 %shr, 128
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_eq_both_equal
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; CHECK-NEXT: icmp eq i8 %a, 0
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define i1 @exact_lshr_eq_both_equal(i8 %a) {
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%shr = lshr exact i8 126, %a
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%cmp = icmp eq i8 %shr, 126
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_ne_both_equal
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; CHECK-NEXT: icmp ne i8 %a, 0
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define i1 @exact_lshr_ne_both_equal(i8 %a) {
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%shr = lshr exact i8 126, %a
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%cmp = icmp ne i8 %shr, 126
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_eq_opposite_msb
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; CHECK-NEXT: icmp eq i8 %a, 7
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define i1 @exact_lshr_eq_opposite_msb(i8 %a) {
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%shr = lshr exact i8 -128, %a
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%cmp = icmp eq i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @lshr_eq_opposite_msb
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; CHECK-NEXT: icmp eq i8 %a, 7
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define i1 @lshr_eq_opposite_msb(i8 %a) {
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%shr = lshr i8 -128, %a
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%cmp = icmp eq i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_ne_opposite_msb
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; CHECK-NEXT: icmp ne i8 %a, 7
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define i1 @exact_lshr_ne_opposite_msb(i8 %a) {
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%shr = lshr exact i8 -128, %a
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%cmp = icmp ne i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @lshr_ne_opposite_msb
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; CHECK-NEXT: icmp ne i8 %a, 7
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define i1 @lshr_ne_opposite_msb(i8 %a) {
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%shr = lshr i8 -128, %a
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%cmp = icmp ne i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_eq
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; CHECK-NEXT: icmp eq i8 %a, 7
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define i1 @exact_ashr_eq(i8 %a) {
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%shr = ashr exact i8 -128, %a
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%cmp = icmp eq i8 %shr, -1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_ne
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; CHECK-NEXT: icmp ne i8 %a, 7
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define i1 @exact_ashr_ne(i8 %a) {
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%shr = ashr exact i8 -128, %a
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%cmp = icmp ne i8 %shr, -1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_eq
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; CHECK-NEXT: icmp eq i8 %a, 2
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define i1 @exact_lshr_eq(i8 %a) {
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%shr = lshr exact i8 4, %a
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%cmp = icmp eq i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_ne
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; CHECK-NEXT: icmp ne i8 %a, 2
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define i1 @exact_lshr_ne(i8 %a) {
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%shr = lshr exact i8 4, %a
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%cmp = icmp ne i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_eq
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; CHECK-NEXT: icmp eq i8 %a, 7
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define i1 @nonexact_ashr_eq(i8 %a) {
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%shr = ashr i8 -128, %a
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%cmp = icmp eq i8 %shr, -1
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_ne
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; CHECK-NEXT: icmp ne i8 %a, 7
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define i1 @nonexact_ashr_ne(i8 %a) {
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%shr = ashr i8 -128, %a
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%cmp = icmp ne i8 %shr, -1
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_eq
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; CHECK-NEXT: icmp eq i8 %a, 2
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define i1 @nonexact_lshr_eq(i8 %a) {
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%shr = lshr i8 4, %a
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%cmp = icmp eq i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_ne
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; CHECK-NEXT: icmp ne i8 %a, 2
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define i1 @nonexact_lshr_ne(i8 %a) {
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%shr = lshr i8 4, %a
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%cmp = icmp ne i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_eq_exactdiv
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; CHECK-NEXT: icmp eq i8 %a, 4
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define i1 @exact_lshr_eq_exactdiv(i8 %a) {
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%shr = lshr exact i8 80, %a
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%cmp = icmp eq i8 %shr, 5
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_ne_exactdiv
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; CHECK-NEXT: icmp ne i8 %a, 4
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define i1 @exact_lshr_ne_exactdiv(i8 %a) {
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%shr = lshr exact i8 80, %a
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%cmp = icmp ne i8 %shr, 5
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_eq_exactdiv
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; CHECK-NEXT: icmp eq i8 %a, 4
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define i1 @nonexact_lshr_eq_exactdiv(i8 %a) {
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%shr = lshr i8 80, %a
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%cmp = icmp eq i8 %shr, 5
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_ne_exactdiv
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; CHECK-NEXT: icmp ne i8 %a, 4
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define i1 @nonexact_lshr_ne_exactdiv(i8 %a) {
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%shr = lshr i8 80, %a
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%cmp = icmp ne i8 %shr, 5
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_eq_exactdiv
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; CHECK-NEXT: icmp eq i8 %a, 4
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define i1 @exact_ashr_eq_exactdiv(i8 %a) {
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%shr = ashr exact i8 -80, %a
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%cmp = icmp eq i8 %shr, -5
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_ne_exactdiv
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; CHECK-NEXT: icmp ne i8 %a, 4
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define i1 @exact_ashr_ne_exactdiv(i8 %a) {
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%shr = ashr exact i8 -80, %a
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%cmp = icmp ne i8 %shr, -5
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_eq_exactdiv
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; CHECK-NEXT: icmp eq i8 %a, 4
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define i1 @nonexact_ashr_eq_exactdiv(i8 %a) {
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%shr = ashr i8 -80, %a
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%cmp = icmp eq i8 %shr, -5
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_ne_exactdiv
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; CHECK-NEXT: icmp ne i8 %a, 4
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define i1 @nonexact_ashr_ne_exactdiv(i8 %a) {
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%shr = ashr i8 -80, %a
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%cmp = icmp ne i8 %shr, -5
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_eq_noexactdiv
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; CHECK-NEXT: ret i1 false
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define i1 @exact_lshr_eq_noexactdiv(i8 %a) {
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%shr = lshr exact i8 80, %a
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%cmp = icmp eq i8 %shr, 31
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_ne_noexactdiv
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; CHECK-NEXT: ret i1 true
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define i1 @exact_lshr_ne_noexactdiv(i8 %a) {
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%shr = lshr exact i8 80, %a
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%cmp = icmp ne i8 %shr, 31
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_eq_noexactdiv
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; CHECK-NEXT: ret i1 false
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define i1 @nonexact_lshr_eq_noexactdiv(i8 %a) {
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%shr = lshr i8 80, %a
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%cmp = icmp eq i8 %shr, 31
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_ne_noexactdiv
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; CHECK-NEXT: ret i1 true
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define i1 @nonexact_lshr_ne_noexactdiv(i8 %a) {
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%shr = lshr i8 80, %a
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%cmp = icmp ne i8 %shr, 31
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_eq_noexactdiv
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; CHECK-NEXT: ret i1 false
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define i1 @exact_ashr_eq_noexactdiv(i8 %a) {
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%shr = ashr exact i8 -80, %a
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%cmp = icmp eq i8 %shr, -31
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_ne_noexactdiv
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; CHECK-NEXT: ret i1 true
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define i1 @exact_ashr_ne_noexactdiv(i8 %a) {
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%shr = ashr exact i8 -80, %a
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%cmp = icmp ne i8 %shr, -31
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_eq_noexactdiv
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; CHECK-NEXT: ret i1 false
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define i1 @nonexact_ashr_eq_noexactdiv(i8 %a) {
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%shr = ashr i8 -80, %a
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%cmp = icmp eq i8 %shr, -31
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_ne_noexactdiv
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; CHECK-NEXT: ret i1 true
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define i1 @nonexact_ashr_ne_noexactdiv(i8 %a) {
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%shr = ashr i8 -80, %a
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%cmp = icmp ne i8 %shr, -31
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_eq_noexactlog
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; CHECK-NEXT: ret i1 false
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define i1 @nonexact_lshr_eq_noexactlog(i8 %a) {
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%shr = lshr i8 90, %a
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%cmp = icmp eq i8 %shr, 30
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_ne_noexactlog
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; CHECK-NEXT: ret i1 true
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define i1 @nonexact_lshr_ne_noexactlog(i8 %a) {
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%shr = lshr i8 90, %a
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%cmp = icmp ne i8 %shr, 30
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_eq_noexactlog
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; CHECK-NEXT: ret i1 false
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define i1 @nonexact_ashr_eq_noexactlog(i8 %a) {
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%shr = ashr i8 -90, %a
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%cmp = icmp eq i8 %shr, -30
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_ne_noexactlog
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; CHECK-NEXT: ret i1 true
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define i1 @nonexact_ashr_ne_noexactlog(i8 %a) {
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%shr = ashr i8 -90, %a
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%cmp = icmp ne i8 %shr, -30
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ret i1 %cmp
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}
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; Don't try to fold the entire body of function @PR20945 into a
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; single `ret i1 true` statement.
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; If %B is equal to 1, then this function would return false.
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; As a consequence, the instruction combiner is not allowed to fold %cmp
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; to 'true'. Instead, it should replace %cmp with a simpler comparison
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; between %B and 1.
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; CHECK-LABEL: @PR20945(
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; CHECK: icmp ne i32 %B, 1
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define i1 @PR20945(i32 %B) {
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%shr = ashr i32 -9, %B
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%cmp = icmp ne i32 %shr, -5
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ret i1 %cmp
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}
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; CHECK-LABEL: @PR21222
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; CHECK: icmp eq i32 %B, 6
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define i1 @PR21222(i32 %B) {
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%shr = ashr i32 -93, %B
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%cmp = icmp eq i32 %shr, -2
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ret i1 %cmp
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}
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; CHECK-LABEL: @PR24873(
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; CHECK: %[[icmp:.*]] = icmp ugt i64 %V, 61
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; CHECK-NEXT: ret i1 %[[icmp]]
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define i1 @PR24873(i64 %V) {
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%ashr = ashr i64 -4611686018427387904, %V
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%icmp = icmp eq i64 %ashr, -1
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ret i1 %icmp
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}
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