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llvm-mirror/test
Alex Lorenz c21c095194 MIR Serialization: Change MIR syntax - use custom syntax for MBBs.
This commit modifies the way the machine basic blocks are serialized - now the
machine basic blocks are serialized using a custom syntax instead of relying on
YAML primitives. Instead of using YAML mappings to represent the individual
machine basic blocks in a machine function's body, the new syntax uses a single
YAML block scalar which contains all of the machine basic blocks and
instructions for that function.

This is an example of a function's body that uses the old syntax:

    body:
      - id: 0
        name: entry
        instructions:
          - '%eax = MOV32r0 implicit-def %eflags'
          - 'RETQ %eax'
    ...

The same body is now written like this:

    body: |
      bb.0.entry:
        %eax = MOV32r0 implicit-def %eflags
        RETQ %eax
    ...

This syntax change is motivated by the fact that the bundled machine
instructions didn't map that well to the old syntax which was using a single
YAML sequence to store all of the machine instructions in a block. The bundled
machine instructions internally use flags like BundledPred and BundledSucc to
determine the bundles, and serializing them as MI flags using the old syntax
would have had a negative impact on the readability and the ease of editing
for MIR files. The new syntax allows me to serialize the bundled machine
instructions using a block construct without relying on the internal flags,
for example:

   BUNDLE implicit-def dead %itstate, implicit-def %s1 ... {
      t2IT 1, 24, implicit-def %itstate
      %s1 = VMOVS killed %s0, 1, killed %cpsr, implicit killed %itstate
   }

This commit also converts the MIR testcases to the new syntax. I developed
a script that can convert from the old syntax to the new one. I will post the
script on the llvm-commits mailing list in the thread for this commit.

llvm-svn: 244982
2015-08-13 23:10:16 +00:00
..
Analysis Emit argmemonly attribute for intrinsics. 2015-08-13 17:40:04 +00:00
Assembler
Bindings
Bitcode Emit argmemonly attribute for intrinsics. 2015-08-13 17:40:04 +00:00
BugPoint
CodeGen MIR Serialization: Change MIR syntax - use custom syntax for MBBs. 2015-08-13 23:10:16 +00:00
DebugInfo Make DW_AT_[MIPS_]linkage_name optional, and off by default for SCE. 2015-08-11 21:36:45 +00:00
ExecutionEngine [mips][mcjit] Calculate correct addend for HI16 and PCHI16 reloc 2015-08-13 15:12:49 +00:00
Feature [IR] Verify EH pad predecessors 2015-08-11 02:48:30 +00:00
FileCheck
Instrumentation [libFuzzer] don't crash if the condition in a switch has unusual type (e.g. i72) 2015-08-11 00:24:39 +00:00
Integer
JitListener
LibDriver
Linker Make DW_AT_[MIPS_]linkage_name optional, and off by default for SCE. 2015-08-11 21:36:45 +00:00
LTO
MC [AArch64] Provide "too few operands" diags on short-form NEON also. 2015-08-13 21:09:13 +00:00
Object
Other
SymbolRewriter
TableGen
tools Enable five passing dsymutil tests on Windows. 2015-08-11 06:05:27 +00:00
Transforms [SimplifyLibCalls] Correctly set the is_zero_undef flag for llvm.cttz 2015-08-13 20:34:26 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh