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613d152216
moves. This avoids the need to promote the operands (or implicitly extend them, a partial register update condition), and can reduce i8 register pressure. This substantially speeds up code such as write_hex in lib/Support/raw_ostream.cpp. subclass-coalesce.ll is too trivial and no longer tests what it was originally intended to test. llvm-svn: 80184
13 lines
350 B
LLVM
13 lines
350 B
LLVM
; RUN: llvm-as < %s | llc -march=x86 > %t
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; RUN: not grep movz %t
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; RUN: not grep cmov %t
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; RUN: grep movb %t | count 2
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; Don't try to use a 16-bit conditional move to do an 8-bit select,
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; because it isn't worth it. Just use a branch instead.
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define i8 @foo(i1 inreg %c, i8 inreg %a, i8 inreg %b) {
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%d = select i1 %c, i8 %a, i8 %b
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ret i8 %d
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}
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