..
AArch64
[AArch64] Remove inexistent system register ERXTS_EL1
2020-04-29 16:43:48 +01:00
AMDGPU
[AMDGPU][MC][GFX908] Corrected src0 of v_accvgpr_write to accept only VGPRs and inline constants.
2020-05-28 15:10:55 +03:00
ARM
[DebugInfo] Report the format of location and range lists [9/10]
2020-06-02 17:55:31 +07:00
AsmParser
Add AIX to the test macro-same-context XFAIL list
2020-05-25 10:19:45 -04:00
AVR
[LLVM][AVR] Support for R_AVR_6 fixup
2020-05-17 19:46:09 +12:00
BPF
COFF
[MC][COFF][ELF] Reject instructions in IMAGE_SCN_CNT_UNINITIALIZED_DATA/SHT_NOBITS sections
2020-04-15 21:02:47 -07:00
Disassembler
[AMDGPU][MC] Corrected v_writelane_b32 to fix a decoding bug
2020-05-28 14:43:49 +03:00
ELF
[MC][X86] Allow SHT_PROGBITS for .eh_frame on x86-64
2020-04-16 10:42:52 -07:00
Hexagon
[Hexagon] pX.new cannot be used with p3:0 as producer
2020-05-19 17:06:34 -05:00
Lanai
MachO
[DebugInfo] Report the format of address range tables [5/10]
2020-06-02 17:55:30 +07:00
Mips
[DebugInfo] Report the format of call frame information entries [6/10]
2020-06-02 17:55:30 +07:00
MSP430
PowerPC
[PowerPC] Add some InstAlias definitions
2020-05-24 14:05:28 +00:00
RISCV
Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC"
2020-05-22 05:36:15 -06:00
Sparc
[Object] Change ELFObjectFile<ELFT>::getFileFormatName() to use BFD names
2020-03-16 07:42:04 -07:00
SystemZ
[SystemZ] Allow specifying plain register numbers in AsmParser
2020-04-29 20:42:30 +02:00
VE
[VE] Support fixed-point operation instructions in MC layer
2020-06-05 11:56:26 +02:00
WebAssembly
[DebugInfo] Report the format of compilation units [3/10]
2020-06-02 17:55:30 +07:00
X86
[X86] Assemble movzb 1280(%rbx, %r12), %r12 after D80608
2020-05-27 09:55:55 -07:00