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ce7b184512
- Handle simple cases of register copies (what current RDF CP allows). - Hexagon-specific dead code elimination: handles dead address updates in post-increment instructions. llvm-svn: 257504
64 lines
1.8 KiB
CMake
64 lines
1.8 KiB
CMake
set(LLVM_TARGET_DEFINITIONS Hexagon.td)
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tablegen(LLVM HexagonGenAsmMatcher.inc -gen-asm-matcher)
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tablegen(LLVM HexagonGenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM HexagonGenCallingConv.inc -gen-callingconv)
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tablegen(LLVM HexagonGenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM HexagonGenDFAPacketizer.inc -gen-dfa-packetizer)
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tablegen(LLVM HexagonGenDisassemblerTables.inc -gen-disassembler)
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tablegen(LLVM HexagonGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM HexagonGenMCCodeEmitter.inc -gen-emitter)
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tablegen(LLVM HexagonGenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM HexagonGenSubtargetInfo.inc -gen-subtarget)
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add_public_tablegen_target(HexagonCommonTableGen)
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add_llvm_target(HexagonCodeGen
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BitTracker.cpp
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HexagonAsmPrinter.cpp
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HexagonBitSimplify.cpp
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HexagonBitTracker.cpp
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HexagonCFGOptimizer.cpp
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HexagonCommonGEP.cpp
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HexagonCopyToCombine.cpp
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HexagonEarlyIfConv.cpp
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HexagonExpandCondsets.cpp
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HexagonExpandPredSpillCode.cpp
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HexagonFixupHwLoops.cpp
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HexagonFrameLowering.cpp
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HexagonGenExtract.cpp
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HexagonGenInsert.cpp
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HexagonGenMux.cpp
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HexagonGenPredicate.cpp
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HexagonHardwareLoops.cpp
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HexagonInstrInfo.cpp
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HexagonISelDAGToDAG.cpp
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HexagonISelLowering.cpp
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HexagonMachineFunctionInfo.cpp
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HexagonMachineScheduler.cpp
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HexagonMCInstLower.cpp
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HexagonNewValueJump.cpp
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HexagonOptimizeSZextends.cpp
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HexagonPeephole.cpp
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HexagonRDF.cpp
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HexagonRDFOpt.cpp
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HexagonRegisterInfo.cpp
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HexagonSelectionDAGInfo.cpp
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HexagonSplitConst32AndConst64.cpp
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HexagonSplitDouble.cpp
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HexagonStoreWidening.cpp
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HexagonSubtarget.cpp
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HexagonTargetMachine.cpp
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HexagonTargetObjectFile.cpp
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HexagonTargetTransformInfo.cpp
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HexagonVLIWPacketizer.cpp
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RDFCopy.cpp
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RDFDeadCode.cpp
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RDFGraph.cpp
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RDFLiveness.cpp
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)
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add_subdirectory(AsmParser)
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add_subdirectory(TargetInfo)
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add_subdirectory(MCTargetDesc)
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add_subdirectory(Disassembler)
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