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llvm-mirror/test/CodeGen
Richard Sandiford c2e496f7ba [SystemZ] Use upper words of GR64s for codegen
This just adds the basics necessary for allocating the upper words to
virtual registers (move, load and store).  The move support is parameterised
in a way that makes it easy to handle zero extensions, but the associated
zero-extend patterns are added by a later patch.

The easiest way of testing this seemed to be add a new "h" register
constraint for high words.  I don't expect the constraint to be useful
in real inline asms, but it should work, so I didn't try to hide it
behind an option.

llvm-svn: 191739
2013-10-01 11:26:28 +00:00
..
AArch64 llvm/test/CodeGen/AArch64/neon-scalar-reduce-pairwise.ll: Use -mtriple here, or aach64-pecoff might be misassumed on win32 hosts. 2013-09-24 04:14:29 +00:00
ARM TBAA: remove !tbaa from testing cases when they are not needed. 2013-09-30 18:17:35 +00:00
CPP [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
Generic [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
Hexagon TBAA: remove !tbaa from testing cases when they are not needed. 2013-09-30 18:17:35 +00:00
Inputs Debug Info: add an identifier field to DICompositeType. 2013-08-26 22:39:55 +00:00
Mips [mips][msa] Added support for matching mod_[us] from normal IR (i.e. not intrinsics) 2013-10-01 10:22:35 +00:00
MSP430 [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
NVPTX [NVPTX] Make constant vector test case endian-independent 2013-09-19 13:14:44 +00:00
PowerPC TBAA: update tbaa format from scalar format to struct-path aware format. 2013-09-30 18:17:55 +00:00
R600 TBAA: update tbaa format from scalar format to struct-path aware format. 2013-09-30 18:17:55 +00:00
SPARC TBAA: update tbaa format from scalar format to struct-path aware format. 2013-09-30 18:17:55 +00:00
SystemZ [SystemZ] Use upper words of GR64s for codegen 2013-10-01 11:26:28 +00:00
Thumb ARM: Use "dmb sy" for barriers on M-class CPUs 2013-08-28 14:39:19 +00:00
Thumb2 Fix spelling intruction -> instruction. 2013-09-28 11:46:15 +00:00
X86 AVX-512: Added X86vzmovl patterns 2013-10-01 08:38:02 +00:00
XCore XCore handling of thread local lowering 2013-09-09 10:42:11 +00:00