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llvm-mirror/test/MC/ARM/multi-section-mapping.s
Tim Northover 2ca847f56b ARM: diagnose ARM/Thumb assembly switches on CPUs only supporting one.
Some ARM CPUs only support ARM mode (ancient v4 ones, for example) and some
only support Thumb mode (M-class ones currently). This makes sure such CPUs
default to the correct mode and makes the AsmParser diagnose an attempt to
switch modes incorrectly.

rdar://14024354

llvm-svn: 183710
2013-06-10 23:20:58 +00:00

36 lines
978 B
ArmAsm

@ RUN: llvm-mc -triple=armv7-linux-gnueabi -filetype=obj < %s | llvm-objdump -t - | FileCheck %s
.text
add r0, r0, r0
@ .wibble should *not* inherit .text's mapping symbol. It's a completely different section.
.section .wibble
add r0, r0, r0
@ A section should be able to start with a $t
.section .starts_thumb
.thumb
adds r0, r0, r0
@ A setion should be able to start with a $d
.section .starts_data
.word 42
@ Changing back to .text should not emit a redundant $a
.text
.arm
add r0, r0, r0
@ With all those constraints, we want:
@ + .text to have $a at 0 and no others
@ + .wibble to have $a at 0
@ + .starts_thumb to have $t at 0
@ + .starts_data to have $d at 0
@ CHECK: 00000000 .text 00000000 $a
@ CHECK-NEXT: 00000000 .wibble 00000000 $a
@ CHECK-NEXT: 00000000 .starts_data 00000000 $d
@ CHECK-NEXT: 00000000 .starts_thumb 00000000 $t
@ CHECK-NOT: ${{[adt]}}