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112bdc8929
There is no advantage in being different and using the same names simplifies clang a bit. llvm-svn: 189141
69 lines
4.1 KiB
LLVM
69 lines
4.1 KiB
LLVM
; RUN: llc < %s -march=x86 -mcpu=generic -mattr=sse4.1 | FileCheck %s
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; RUN: llc < %s -march=x86 -mcpu=atom | FileCheck -check-prefix=ATOM %s
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; Transpose example using the more generic vector shuffle. Return float8
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; instead of float16
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; ModuleID = 'transpose2_opt.bc'
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
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target triple = "i386-apple-cl.1.0"
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@r0 = common global <4 x float> zeroinitializer, align 16 ; <<4 x float>*> [#uses=1]
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@r1 = common global <4 x float> zeroinitializer, align 16 ; <<4 x float>*> [#uses=1]
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@r2 = common global <4 x float> zeroinitializer, align 16 ; <<4 x float>*> [#uses=1]
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@r3 = common global <4 x float> zeroinitializer, align 16 ; <<4 x float>*> [#uses=1]
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define <8 x float> @__transpose2(<4 x float> %p0, <4 x float> %p1, <4 x float> %p2, <4 x float> %p3) nounwind {
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entry:
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; CHECK: transpose2
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; CHECK: unpckhps
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; CHECK: unpckhps
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; CHECK: unpcklps
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; CHECK: unpckhps
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; Different instruction order for Atom.
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; ATOM: transpose2
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; ATOM: unpckhps
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; ATOM: unpckhps
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; ATOM: unpckhps
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; ATOM: unpcklps
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%unpcklps = shufflevector <4 x float> %p0, <4 x float> %p2, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=2]
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%unpckhps = shufflevector <4 x float> %p0, <4 x float> %p2, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=2]
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%unpcklps8 = shufflevector <4 x float> %p1, <4 x float> %p3, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=2]
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%unpckhps11 = shufflevector <4 x float> %p1, <4 x float> %p3, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=2]
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%unpcklps14 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
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%unpckhps17 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1]
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%r1 = shufflevector <4 x float> %unpcklps14, <4 x float> %unpckhps17, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >
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%unpcklps20 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
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%unpckhps23 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1]
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%r2 = shufflevector <4 x float> %unpcklps20, <4 x float> %unpckhps23, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >
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; %r3 = shufflevector <8 x float> %r1, <8 x float> %r2, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15 >;
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ret <8 x float> %r2
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}
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define <2 x i64> @lo_hi_shift(float* nocapture %x, float* nocapture %y) nounwind {
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entry:
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; movhps should happen before extractps to assure it gets the correct value.
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; CHECK: lo_hi_shift
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; CHECK: movhps ([[BASEREG:%[a-z]+]]),
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; CHECK: extractps ${{[0-9]+}}, %xmm{{[0-9]+}}, {{[0-9]*}}([[BASEREG]])
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; CHECK: extractps ${{[0-9]+}}, %xmm{{[0-9]+}}, {{[0-9]*}}([[BASEREG]])
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; ATOM: lo_hi_shift
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; ATOM: movhps ([[BASEREG:%[a-z]+]]),
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; ATOM: movd %xmm{{[0-9]+}}, {{[0-9]*}}([[BASEREG]])
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; ATOM: movd %xmm{{[0-9]+}}, {{[0-9]*}}([[BASEREG]])
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%v.i = bitcast float* %y to <4 x float>*
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%0 = load <4 x float>* %v.i, align 1
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%1 = bitcast float* %x to <1 x i64>*
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%.val = load <1 x i64>* %1, align 1
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%2 = bitcast <1 x i64> %.val to <2 x float>
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%shuffle.i = shufflevector <2 x float> %2, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
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%shuffle1.i = shufflevector <4 x float> %0, <4 x float> %shuffle.i, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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%cast.i = bitcast <4 x float> %0 to <2 x i64>
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%extract.i = extractelement <2 x i64> %cast.i, i32 1
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%3 = bitcast float* %x to i64*
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store i64 %extract.i, i64* %3, align 4
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%4 = bitcast <4 x float> %0 to <16 x i8>
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%5 = bitcast <4 x float> %shuffle1.i to <16 x i8>
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%palignr = shufflevector <16 x i8> %5, <16 x i8> %4, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>
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%6 = bitcast <16 x i8> %palignr to <2 x i64>
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ret <2 x i64> %6
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}
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