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llvm-mirror/test/CodeGen/Thumb2
Petr Pavlu d6dcfd1b38 [ARM] Enable spilling of the hGPR register class in Thumb2
Generalize code in Thumb2InstrInfo::storeRegToStackSlot() and
loadRegToStackSlot() to allow the GPR class or any of its sub-classes
(including hGPR) to be stored/loaded by ARM::t2STRi12/ARM::t2LDRi12.

Differential Revision: https://reviews.llvm.org/D51927

llvm-svn: 346401
2018-11-08 13:02:10 +00:00
..
2009-07-17-CrossRegClassCopy.ll
2009-07-21-ISelBug.ll
2009-07-23-CPIslandBug.ll
2009-07-30-PEICrash.ll
2009-08-01-WrongLDRBOpc.ll
2009-08-02-CoalescerBug.ll
2009-08-04-CoalescerAssert.ll
2009-08-04-CoalescerBug.ll
2009-08-04-ScavengerAssert.ll
2009-08-04-SubregLoweringBug2.ll
2009-08-04-SubregLoweringBug3.ll
2009-08-04-SubregLoweringBug.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
2009-08-06-SpDecBug.ll
2009-08-07-CoalescerBug.ll
2009-08-07-NeonFPBug.ll
2009-08-08-ScavengerAssert.ll
2009-08-10-ISelBug.ll
2009-08-21-PostRAKill4.ll
2009-09-01-PostRAProlog.ll
2009-10-15-ITBlockBranch.ll
2009-11-01-CopyReg2RegBug.ll
2009-11-11-ScavengerAssert.ll
2009-11-13-STRDBug.ll
2009-12-01-LoopIVUsers.ll
2010-01-06-TailDuplicateLabels.ll Work around grep vs. CRLF issue in Thumb2 test by matching excess whitespace 2018-09-18 00:04:29 +00:00
2010-01-19-RemovePredicates.ll
2010-02-11-phi-cycle.ll
2010-02-24-BigStack.ll
2010-03-08-addi12-ccout.ll
2010-03-15-AsmCCClobber.ll ARM: convert ORR instructions to ADD where possible on Thumb. 2018-06-20 12:09:44 +00:00
2010-04-15-DynAllocBug.ll
2010-04-26-CopyRegCrash.ll
2010-05-24-rsbs.ll
2010-06-14-NEONCoalescer.ll [CodeGen] Don't print "pred:" and "opt:" in -debug output 2018-01-09 17:31:07 +00:00
2010-06-19-ITBlockCrash.ll
2010-06-21-TailMergeBug.ll
2010-08-10-VarSizedAllocaBug.ll
2010-11-22-EpilogueBug.ll Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred. 2018-06-20 22:01:04 +00:00
2010-12-03-AddSPNarrowing.ll
2011-04-21-FILoweringBug.ll
2011-06-07-TwoAddrEarlyClobber.ll
2011-12-16-T2SizeReduceAssert.ll
2012-01-13-CBNZBug.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
2013-02-19-tail-call-register-hint.ll
2013-03-02-vduplane-nonconstant-source-index.ll
2013-03-06-vector-sext-operand-scalarize.ll
aapcs.ll [ARM] Return true in enableMultipleCopyHints(). 2018-02-16 09:51:01 +00:00
aligned-constants.ll
aligned-spill.ll
bfi.ll
bfx.ll
bicbfi.ll [CodeGen] Always use printReg to print registers in both MIR and debug 2017-11-30 16:12:24 +00:00
buildvector-crash.ll
carry.ll
cbnz.ll
cmp-frame.ll ARM: Don't rewrite add reg, $sp, 0 -> mov reg, $sp if the add defines CPSR. 2018-02-27 19:00:59 +00:00
constant-islands-jump-table.ll
constant-islands-new-island-padding.ll
constant-islands-new-island.ll
constant-islands.ll
cortex-fp.ll
crash.ll
cross-rc-coalescing-1.ll
cross-rc-coalescing-2.ll [Thumb2] fix typo in test from r332548 2018-05-17 03:24:25 +00:00
div.ll
emit-unwinding.ll
float-cmp.ll [ARM] Materialise some boolean values to avoid a branch 2018-02-16 09:23:59 +00:00
float-intrinsics-double.ll
float-intrinsics-float.ll [ARM] Do not fuse VADD and VMUL on the Cortex-M4 and Cortex-M33 2018-09-24 12:02:50 +00:00
float-ops.ll
frame-pointer.ll
frameless2.ll
frameless.ll
high-reg-spill.mir [ARM] Enable spilling of the hGPR register class in Thumb2 2018-11-08 13:02:10 +00:00
ifcvt-compare.ll
ifcvt-neon-deprecated.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
ifcvt-no-branch-predictor.ll [CodeGen] Add a new pass for PostRA sink 2018-03-22 20:06:47 +00:00
ifcvt-rescan-bug-2016-08-22.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
ifcvt-rescan-diamonds.ll
inflate-regs.ll
inlineasm.ll
intrinsics-cc.ll
intrinsics-coprocessor.ll
large-call.ll
large-stack.ll
ldr-str-imm12.ll
lit.local.cfg
longMACt.ll
lsr-deficiency.ll
machine-licm.ll
mul_const.ll
pic-load.ll
segmented-stacks.ll
setjmp_longjmp.ll
stack_guard_remat.ll
t2sizereduction.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
tail-call-r9.ll
tbb-removeadd.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
thumb2-adc.ll
thumb2-add2.ll
thumb2-add3.ll
thumb2-add4.ll
thumb2-add5.ll
thumb2-add6.ll
thumb2-add.ll
thumb2-and2.ll
thumb2-and.ll
thumb2-asr2.ll
thumb2-asr.ll
thumb2-bcc.ll
thumb2-bfc.ll
thumb2-bic.ll
thumb2-branch.ll
thumb2-call-tc.ll
thumb2-call.ll
thumb2-cbnz.ll
thumb2-clz.ll
thumb2-cmn2.ll [ARM] Materialise some boolean values to avoid a branch 2018-02-16 09:23:59 +00:00
thumb2-cmn.ll [ARM] Materialise some boolean values to avoid a branch 2018-02-16 09:23:59 +00:00
thumb2-cmp.ll [ARM] Treat cmn immediates as legal in isLegalICmpImmediate. 2018-07-10 23:44:37 +00:00
thumb2-cpsr-liveness.ll
thumb2-eor2.ll
thumb2-eor.ll
thumb2-ifcvt1-tc.ll
thumb2-ifcvt1.ll
thumb2-ifcvt2.ll MachO: trap unreachable instructions 2018-04-13 22:25:20 +00:00
thumb2-ifcvt3.ll
thumb2-jtb.ll Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred. 2018-06-20 22:01:04 +00:00
thumb2-ldm.ll
thumb2-ldr_ext.ll
thumb2-ldr_post.ll
thumb2-ldr_pre.ll
thumb2-ldr.ll
thumb2-ldrb.ll
thumb2-ldrd.ll
thumb2-ldrh.ll
thumb2-lsl2.ll
thumb2-lsl.ll
thumb2-lsr2.ll
thumb2-lsr3.ll
thumb2-lsr.ll
thumb2-mla.ll
thumb2-mls.ll
thumb2-mov.ll
thumb2-mul.ll
thumb2-mulhi.ll
thumb2-mvn2.ll
thumb2-mvn.ll
thumb2-neg.ll
thumb2-orn2.ll
thumb2-orn.ll
thumb2-orr2.ll
thumb2-orr.ll
thumb2-pack.ll
thumb2-rev16.ll
thumb2-rev.ll
thumb2-ror.ll
thumb2-rsb2.ll
thumb2-rsb.ll
thumb2-sbc.ll
thumb2-select_xform.ll [ARM] Return true in enableMultipleCopyHints(). 2018-02-16 09:51:01 +00:00
thumb2-select.ll
thumb2-shifter.ll
thumb2-smla.ll
thumb2-smul.ll
thumb2-spill-q.ll [Thumb] preserve test intent by removing undef 2018-05-16 22:47:42 +00:00
thumb2-str_post.ll
thumb2-str_pre.ll
thumb2-str.ll
thumb2-strb.ll
thumb2-strh.ll
thumb2-sub2.ll
thumb2-sub3.ll
thumb2-sub4.ll
thumb2-sub5.ll
thumb2-sub.ll
thumb2-sxt_rot.ll
thumb2-sxt-uxt.ll
thumb2-tbb.ll
thumb2-tbh.ll [ARM] Make InstrEmitter mark CPSR defs dead for Thumb1. 2018-10-26 19:32:24 +00:00
thumb2-teq2.ll [ARM] Materialise some boolean values to avoid a branch 2018-02-16 09:23:59 +00:00
thumb2-teq.ll [ARM] Materialise some boolean values to avoid a branch 2018-02-16 09:23:59 +00:00
thumb2-tst2.ll [ARM] Materialise some boolean values to avoid a branch 2018-02-16 09:23:59 +00:00
thumb2-tst.ll [ARM] Materialise some boolean values to avoid a branch 2018-02-16 09:23:59 +00:00
thumb2-uxt_rot.ll
thumb2-uxtb.ll ARM: convert ORR instructions to ADD where possible on Thumb. 2018-06-20 12:09:44 +00:00
tls1.ll
tls2.ll
tpsoft.ll
umulo-64-legalisation-lowering.ll [SchedModel] Fix for read advance cycles with implicit pseudo operands. 2018-10-30 15:04:40 +00:00
umulo-128-legalisation-lowering.ll [SchedModel] Fix for read advance cycles with implicit pseudo operands. 2018-10-30 15:04:40 +00:00
unreachable-large-offset-gep.ll CGP: Clear data structures at the end of a loop iteration instead of the beginning. 2018-10-23 21:23:18 +00:00
v8_IT_1.ll
v8_IT_2.ll
v8_IT_3.ll [arm] Fix Unnecessary reloads from GOT. 2017-11-13 20:45:38 +00:00
v8_IT_4.ll
v8_IT_5.ll
v8_IT_6.ll