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llvm-mirror/test/CodeGen/Thumb2/ifcvt-no-branch-predictor.ll
Jun Bum Lim 834ee28da9 [CodeGen] Add a new pass for PostRA sink
Summary:
This pass sinks COPY instructions into a successor block, if the COPY is not
used in the current block and the COPY is live-in to a single successor
(i.e., doesn't require the COPY to be duplicated).  This avoids executing the
the copy on paths where their results aren't needed.  This also exposes
additional opportunites for dead copy elimination and shrink wrapping.

These copies were either not handled by or are inserted after the MachineSink
pass. As an example of the former case, the MachineSink pass cannot sink
COPY instructions with allocatable source registers; for AArch64 these type
of copy instructions are frequently used to move function parameters (PhyReg)
into virtual registers in the entry block..

For the machine IR below, this pass will sink %w19 in the entry into its
successor (%bb.1) because %w19 is only live-in in %bb.1.

```
   %bb.0:
      %wzr = SUBSWri %w1, 1
      %w19 = COPY %w0
      Bcc 11, %bb.2
    %bb.1:
      Live Ins: %w19
      BL @fun
      %w0 = ADDWrr %w0, %w19
      RET %w0
    %bb.2:
      %w0 = COPY %wzr
      RET %w0
```
As we sink %w19 (CSR in AArch64) into %bb.1, the shrink-wrapping pass will be
able to see %bb.0 as a candidate.

With this change I observed 12% more shrink-wrapping candidate and 13% more dead copies deleted  in spec2000/2006/2017 on AArch64.

Reviewers: qcolombet, MatzeB, thegameg, mcrosier, gberry, hfinkel, john.brawn, twoh, RKSimon, sebpop, kparzysz

Reviewed By: sebpop

Subscribers: evandro, sebpop, sfertile, aemerson, mgorny, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D41463

llvm-svn: 328237
2018-03-22 20:06:47 +00:00

159 lines
3.1 KiB
LLVM

; RUN: llc < %s -mtriple=thumbv7m -mcpu=cortex-m7 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-BP
; RUN: llc < %s -mtriple=thumbv7m -mcpu=cortex-m3 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NOBP
declare void @otherfn()
; CHECK-LABEL: triangle1:
; CHECK: itt ne
; CHECK: movne
; CHECK: strne
define i32 @triangle1(i32 %n, i32* %p) {
entry:
%tobool = icmp eq i32 %n, 0
br i1 %tobool, label %if.end, label %if.then
if.then:
store i32 1, i32* %p, align 4
br label %if.end
if.end:
tail call void @otherfn()
ret i32 0
}
; CHECK-LABEL: triangle2:
; CHECK-BP: itttt ne
; CHECK-BP: movne
; CHECK-BP: strne
; CHECK-BP: movne
; CHECK-BP: strne
; CHECK-NOBP: cbz
; CHECK-NOBP: movs
; CHECK-NOBP: str
; CHECK-NOBP: movs
; CHECK-NOBP: str
define i32 @triangle2(i32 %n, i32* %p, i32* %q) {
entry:
%tobool = icmp eq i32 %n, 0
br i1 %tobool, label %if.end, label %if.then
if.then:
store i32 1, i32* %p, align 4
store i32 2, i32* %q, align 4
br label %if.end
if.end:
tail call void @otherfn()
ret i32 0
}
; CHECK-LABEL: triangle3:
; CHECK: cbz
; CHECK: movs
; CHECK: str
; CHECK: movs
; CHECK: str
; CHECK: movs
; CHECK: str
define i32 @triangle3(i32 %n, i32* %p, i32* %q, i32* %r) {
entry:
%tobool = icmp eq i32 %n, 0
br i1 %tobool, label %if.end, label %if.then
if.then:
store i32 1, i32* %p, align 4
store i32 2, i32* %q, align 4
store i32 3, i32* %r, align 4
br label %if.end
if.end:
tail call void @otherfn()
ret i32 0
}
; CHECK-LABEL: diamond1:
; CHECK: itee eq
; CHECK: ldreq
; CHECK: strne
define i32 @diamond1(i32 %n, i32* %p) {
entry:
%tobool = icmp eq i32 %n, 0
br i1 %tobool, label %if.else, label %if.then
if.then:
store i32 %n, i32* %p, align 4
br label %if.end
if.else:
%0 = load i32, i32* %p, align 4
br label %if.end
if.end:
%n.addr.0 = phi i32 [ %n, %if.then ], [ %0, %if.else ]
tail call void @otherfn()
ret i32 %n.addr.0
}
; CHECK-LABEL: diamond2:
; CHECK-BP: cbz
; CHECK-BP: str
; CHECK-BP: str
; CHECK-BP: b
; CHECK-BP: str
; CHECK-BP: ldr
; CHECK-NOBP: ittee
; CHECK-NOBP: streq
; CHECK-NOBP: ldreq
; CHECK-NOBP: strne
; CHECK-NOBP: strne
define i32 @diamond2(i32 %n, i32* %p, i32* %q) {
entry:
%tobool = icmp eq i32 %n, 0
br i1 %tobool, label %if.else, label %if.then
if.then:
store i32 %n, i32* %p, align 4
%arrayidx = getelementptr inbounds i32, i32* %p, i32 2
store i32 %n, i32* %arrayidx, align 4
br label %if.end
if.else:
store i32 %n, i32* %q, align 4
%0 = load i32, i32* %p, align 4
br label %if.end
if.end:
%n.addr.0 = phi i32 [ %n, %if.then ], [ %0, %if.else ]
tail call void @otherfn()
ret i32 %n.addr.0
}
; CHECK-LABEL: diamond3:
; CHECK: cbz
; CHECK: movs
; CHECK: str
; CHECK: b
; CHECK: ldr
; CHECK: ldr
; CHECK: adds
define i32 @diamond3(i32 %n, i32* %p, i32* %q) {
entry:
%tobool = icmp eq i32 %n, 0
br i1 %tobool, label %if.else, label %if.then
if.then:
store i32 1, i32* %p, align 4
br label %if.end
if.else:
%0 = load i32, i32* %p, align 4
%1 = load i32, i32* %q, align 4
%add = add nsw i32 %1, %0
br label %if.end
if.end:
%n.addr.0 = phi i32 [ %n, %if.then ], [ %add, %if.else ]
tail call void @otherfn()
ret i32 %n.addr.0
}