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llvm-mirror/lib/Target/PowerPC
Chris Lattner c3981dc548 Align functions to 16-byte boundaries, to eliminate noise in performance measurements. This improves the performance of 'treeadd' by about 20% with the dag
isel, restoring it to the pattern-isel level (which happens to get the alignment right).

llvm-svn: 23194
2005-09-01 23:08:50 +00:00
..
.cvsignore
LICENSE.TXT
Makefile
PowerPC.h
PowerPC.td
PowerPCAsmPrinter.cpp Align functions to 16-byte boundaries, to eliminate noise in performance measurements. This improves the performance of 'treeadd' by about 20% with the dag 2005-09-01 23:08:50 +00:00
PowerPCBranchSelector.cpp Propagate cr# from COND_BRANCH to the actual branch instruction as appropriate 2005-08-26 23:41:27 +00:00
PowerPCFrameInfo.h
PowerPCInstrBuilder.h
PowerPCInstrFormats.td Fix JIT encoding of conditional branches 2005-08-26 04:11:42 +00:00
PowerPCInstrInfo.h
PowerPCInstrInfo.td The condition register being branched on may not be cr0, as such, print it. 2005-08-26 23:42:05 +00:00
PowerPCJITInfo.h
PowerPCRegisterInfo.td
PowerPCTargetMachine.cpp 1. Use SubtargetFeatures in llc/lli. 2005-09-01 21:38:21 +00:00
PowerPCTargetMachine.h 1. Use SubtargetFeatures in llc/lli. 2005-09-01 21:38:21 +00:00
PPC32.td
PPC32CodeEmitter.cpp Split IMPLICIT_DEF into IMPLICIT_DEF_GPR and IMPLICIT_DEF_FP, so that the 2005-08-24 23:08:16 +00:00
PPC32InstrInfo.cpp
PPC32InstrInfo.h
PPC32ISelPattern.cpp Move FCTIWZ handling out of the instruction selectors and into legalization, 2005-08-31 21:09:52 +00:00
PPC32JITInfo.cpp
PPC32JITInfo.h
PPC32RegisterInfo.cpp teach getClass what a condition reg is 2005-08-26 21:51:29 +00:00
PPC32RegisterInfo.h
PPC32RegisterInfo.td
PPC32Relocations.h
PPC32TargetMachine.h 1. Use SubtargetFeatures in llc/lli. 2005-09-01 21:38:21 +00:00
PPC64.td
PPC64RegisterInfo.td
PPCISelDAGToDAG.cpp Implement dynamic allocas correctly. In particular, because we were copying 2005-09-01 21:31:30 +00:00
PPCISelLowering.cpp Move FCTIWZ handling out of the instruction selectors and into legalization, 2005-08-31 21:09:52 +00:00
PPCISelLowering.h Move FCTIWZ handling out of the instruction selectors and into legalization, 2005-08-31 21:09:52 +00:00
PPCSubtarget.cpp 1. Use SubtargetFeatures in llc/lli. 2005-09-01 21:38:21 +00:00
PPCSubtarget.h 1. Use SubtargetFeatures in llc/lli. 2005-09-01 21:38:21 +00:00
README.txt add an idea 2005-08-24 18:15:24 +00:00

TODO:
* gpr0 allocation
* implement do-loop -> bdnz transform
* implement powerpc-64 for darwin
* use stfiwx in float->int
* be able to combine sequences like the following into 2 instructions:
	lis r2, ha16(l2__ZTV4Cell)
	la r2, lo16(l2__ZTV4Cell)(r2)
	addi r2, r2, 8

* Teach LLVM how to codegen this:
unsigned short foo(float a) { return a; }
as:
_foo:
        fctiwz f0,f1
        stfd f0,-8(r1)
        lhz r3,-2(r1)
        blr
not:
_foo:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        rlwinm r3, r2, 0, 16, 31
        blr


* Support 'update' load/store instructions.  These are cracked on the G5, but
  are still a codesize win.

* Add a custom legalizer for the GlobalAddress node, to move the funky darwin
  stub stuff from the instruction selector to the legalizer (exposing low-level
  operations to the dag for optzn.  For example, we want to codegen this:

        int A = 0;
        void B() { A++; }
  as:
        lis r9,ha16(_A)
        lwz r2,lo16(_A)(r9)
        addi r2,r2,1
        stw r2,lo16(_A)(r9)
  not:
        lis r2, ha16(_A)
        lwz r2, lo16(_A)(r2)
        addi r2, r2, 1
        lis r3, ha16(_A)
        stw r2, lo16(_A)(r3)

* should hint to the branch select pass that it doesn't need to print the
  second unconditional branch, so we don't end up with things like:
	b .LBBl42__2E_expand_function_8_674	; loopentry.24
	b .LBBl42__2E_expand_function_8_42	; NewDefault
	b .LBBl42__2E_expand_function_8_42	; NewDefault

===-------------------------------------------------------------------------===

* Codegen this:

   void test2(int X) {
     if (X == 0x12345678) bar();
   }

    as:

       xoris r0,r3,0x1234
       cmpwi cr0,r0,0x5678
       beq cr0,L6

    not:

        lis r2, 4660
        ori r2, r2, 22136 
        cmpw cr0, r3, r2  
        bne .LBB_test2_2

===-------------------------------------------------------------------------===

Lump the constant pool for each function into ONE pic object, and reference
pieces of it as offsets from the start.  For functions like this (contrived
to have lots of constants obviously):

double X(double Y) { return (Y*1.23 + 4.512)*2.34 + 14.38; }

We generate:

_X:
        lis r2, ha16(.CPI_X_0)
        lfd f0, lo16(.CPI_X_0)(r2)
        lis r2, ha16(.CPI_X_1)
        lfd f2, lo16(.CPI_X_1)(r2)
        fmadd f0, f1, f0, f2
        lis r2, ha16(.CPI_X_2)
        lfd f1, lo16(.CPI_X_2)(r2)
        lis r2, ha16(.CPI_X_3)
        lfd f2, lo16(.CPI_X_3)(r2)
        fmadd f1, f0, f1, f2
        blr

It would be better to materialize .CPI_X into a register, then use immediates
off of the register to avoid the lis's.  This is even more important in PIC 
mode.

===-------------------------------------------------------------------------===