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c3a4f33cc1
Namely, check if the target allows to fold more that one register in the addressing mode and if yes, adjust the cost accordingly. Prior to this commit, reg1 + scale * reg2 accesses were artificially preferred to reg1 + reg2 accesses. Indeed, the cost model wrongly assumed that reg1 + reg2 needs a temporary register for the computation, whereas it was correctly estimated for reg1 + scale * reg2. <rdar://problem/13973908> llvm-svn: 183021 |
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Hello | ||
InstCombine | ||
Instrumentation | ||
IPO | ||
ObjCARC | ||
Scalar | ||
Utils | ||
Vectorize | ||
CMakeLists.txt | ||
LLVMBuild.txt | ||
Makefile |