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https://github.com/RPCS3/llvm-mirror.git
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219 lines
7.5 KiB
LLVM
219 lines
7.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; This turns into a&1 != 0
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define <2 x i1> @test1(<2 x i64> %a) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i64> %a, <i64 1, i64 1>
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; CHECK-NEXT: [[T:%.*]] = icmp ne <2 x i64> [[TMP1]], zeroinitializer
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; CHECK-NEXT: ret <2 x i1> [[T]]
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;
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%t = trunc <2 x i64> %a to <2 x i1>
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ret <2 x i1> %t
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}
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; The ashr turns into an lshr.
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define <2 x i64> @test2(<2 x i64> %a) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: [[B:%.*]] = and <2 x i64> %a, <i64 65535, i64 65535>
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; CHECK-NEXT: [[T:%.*]] = lshr <2 x i64> [[B]], <i64 1, i64 1>
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; CHECK-NEXT: ret <2 x i64> [[T]]
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;
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%b = and <2 x i64> %a, <i64 65535, i64 65535>
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%t = ashr <2 x i64> %b, <i64 1, i64 1>
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ret <2 x i64> %t
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}
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define <2 x i64> @test3(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord <4 x float> %a, %b
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; CHECK-NEXT: [[AND:%.*]] = sext <4 x i1> [[TMP1]] to <4 x i32>
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; CHECK-NEXT: [[CONV:%.*]] = bitcast <4 x i32> [[AND]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[CONV]]
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;
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%cmp = fcmp ord <4 x float> %a, zeroinitializer
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%sext = sext <4 x i1> %cmp to <4 x i32>
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%cmp4 = fcmp ord <4 x float> %b, zeroinitializer
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%sext5 = sext <4 x i1> %cmp4 to <4 x i32>
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%and = and <4 x i32> %sext, %sext5
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%conv = bitcast <4 x i32> %and to <2 x i64>
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ret <2 x i64> %conv
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}
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define <2 x i64> @test4(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno <4 x float> %a, %b
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; CHECK-NEXT: [[OR:%.*]] = sext <4 x i1> [[TMP1]] to <4 x i32>
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; CHECK-NEXT: [[CONV:%.*]] = bitcast <4 x i32> [[OR]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[CONV]]
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;
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%cmp = fcmp uno <4 x float> %a, zeroinitializer
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%sext = sext <4 x i1> %cmp to <4 x i32>
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%cmp4 = fcmp uno <4 x float> %b, zeroinitializer
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%sext5 = sext <4 x i1> %cmp4 to <4 x i32>
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%or = or <4 x i32> %sext, %sext5
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%conv = bitcast <4 x i32> %or to <2 x i64>
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ret <2 x i64> %conv
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}
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; rdar://7434900
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define <2 x i64> @test5(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp ult <4 x float> %a, zeroinitializer
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; CHECK-NEXT: [[CMP4:%.*]] = fcmp ult <4 x float> %b, zeroinitializer
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; CHECK-NEXT: [[NARROW:%.*]] = and <4 x i1> [[CMP4]], [[CMP]]
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; CHECK-NEXT: [[AND:%.*]] = sext <4 x i1> [[NARROW]] to <4 x i32>
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; CHECK-NEXT: [[CONV:%.*]] = bitcast <4 x i32> [[AND]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[CONV]]
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;
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%cmp = fcmp ult <4 x float> %a, zeroinitializer
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%sext = sext <4 x i1> %cmp to <4 x i32>
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%cmp4 = fcmp ult <4 x float> %b, zeroinitializer
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%sext5 = sext <4 x i1> %cmp4 to <4 x i32>
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%and = and <4 x i32> %sext, %sext5
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%conv = bitcast <4 x i32> %and to <2 x i64>
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ret <2 x i64> %conv
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}
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define void @convert(<2 x i32>* %dst.addr, <2 x i64> %src) {
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; CHECK-LABEL: @convert(
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; CHECK-NEXT: [[VAL:%.*]] = trunc <2 x i64> %src to <2 x i32>
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; CHECK-NEXT: [[ADD:%.*]] = add <2 x i32> [[VAL]], <i32 1, i32 1>
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; CHECK-NEXT: store <2 x i32> [[ADD]], <2 x i32>* %dst.addr, align 8
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; CHECK-NEXT: ret void
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;
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%val = trunc <2 x i64> %src to <2 x i32>
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%add = add <2 x i32> %val, <i32 1, i32 1>
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store <2 x i32> %add, <2 x i32>* %dst.addr
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ret void
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}
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define <2 x i65> @foo(<2 x i64> %t) {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i64> %t, <i64 4294967295, i64 4294967295>
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; CHECK-NEXT: [[B:%.*]] = zext <2 x i64> [[TMP1]] to <2 x i65>
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; CHECK-NEXT: ret <2 x i65> [[B]]
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;
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%a = trunc <2 x i64> %t to <2 x i32>
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%b = zext <2 x i32> %a to <2 x i65>
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ret <2 x i65> %b
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}
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define <2 x i64> @bar(<2 x i65> %t) {
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; CHECK-LABEL: @bar(
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; CHECK-NEXT: [[A:%.*]] = trunc <2 x i65> %t to <2 x i64>
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; CHECK-NEXT: [[B:%.*]] = and <2 x i64> [[A]], <i64 4294967295, i64 4294967295>
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; CHECK-NEXT: ret <2 x i64> [[B]]
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;
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%a = trunc <2 x i65> %t to <2 x i32>
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%b = zext <2 x i32> %a to <2 x i64>
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ret <2 x i64> %b
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}
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define <2 x i64> @bars(<2 x i65> %t) {
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; CHECK-LABEL: @bars(
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; CHECK-NEXT: [[A:%.*]] = trunc <2 x i65> %t to <2 x i64>
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; CHECK-NEXT: [[SEXT:%.*]] = shl <2 x i64> [[A]], <i64 32, i64 32>
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; CHECK-NEXT: [[B:%.*]] = ashr exact <2 x i64> [[SEXT]], <i64 32, i64 32>
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; CHECK-NEXT: ret <2 x i64> [[B]]
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;
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%a = trunc <2 x i65> %t to <2 x i32>
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%b = sext <2 x i32> %a to <2 x i64>
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ret <2 x i64> %b
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}
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define <2 x i64> @quxs(<2 x i64> %t) {
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; CHECK-LABEL: @quxs(
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; CHECK-NEXT: [[SEXT:%.*]] = shl <2 x i64> %t, <i64 32, i64 32>
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; CHECK-NEXT: [[B:%.*]] = ashr exact <2 x i64> [[SEXT]], <i64 32, i64 32>
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; CHECK-NEXT: ret <2 x i64> [[B]]
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;
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%a = trunc <2 x i64> %t to <2 x i32>
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%b = sext <2 x i32> %a to <2 x i64>
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ret <2 x i64> %b
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}
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define <2 x i64> @quxt(<2 x i64> %t) {
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; CHECK-LABEL: @quxt(
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; CHECK-NEXT: [[A:%.*]] = shl <2 x i64> %t, <i64 32, i64 32>
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; CHECK-NEXT: [[B:%.*]] = ashr exact <2 x i64> [[A]], <i64 32, i64 32>
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; CHECK-NEXT: ret <2 x i64> [[B]]
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;
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%a = shl <2 x i64> %t, <i64 32, i64 32>
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%b = ashr <2 x i64> %a, <i64 32, i64 32>
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ret <2 x i64> %b
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}
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define <2 x double> @fa(<2 x double> %t) {
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; CHECK-LABEL: @fa(
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; CHECK-NEXT: [[A:%.*]] = fptrunc <2 x double> %t to <2 x float>
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; CHECK-NEXT: [[B:%.*]] = fpext <2 x float> [[A]] to <2 x double>
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; CHECK-NEXT: ret <2 x double> [[B]]
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;
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%a = fptrunc <2 x double> %t to <2 x float>
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%b = fpext <2 x float> %a to <2 x double>
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ret <2 x double> %b
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}
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define <2 x double> @fb(<2 x double> %t) {
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; CHECK-LABEL: @fb(
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; CHECK-NEXT: [[A:%.*]] = fptoui <2 x double> %t to <2 x i64>
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; CHECK-NEXT: [[B:%.*]] = uitofp <2 x i64> [[A]] to <2 x double>
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; CHECK-NEXT: ret <2 x double> [[B]]
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;
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%a = fptoui <2 x double> %t to <2 x i64>
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%b = uitofp <2 x i64> %a to <2 x double>
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ret <2 x double> %b
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}
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define <2 x double> @fc(<2 x double> %t) {
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; CHECK-LABEL: @fc(
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; CHECK-NEXT: [[A:%.*]] = fptosi <2 x double> %t to <2 x i64>
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; CHECK-NEXT: [[B:%.*]] = sitofp <2 x i64> [[A]] to <2 x double>
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; CHECK-NEXT: ret <2 x double> [[B]]
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;
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%a = fptosi <2 x double> %t to <2 x i64>
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%b = sitofp <2 x i64> %a to <2 x double>
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ret <2 x double> %b
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}
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; PR9228
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define <4 x float> @f(i32 %a) {
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; CHECK-LABEL: @f(
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; CHECK-NEXT: ret <4 x float> undef
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;
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%dim = insertelement <4 x i32> undef, i32 %a, i32 0
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%dim30 = insertelement <4 x i32> %dim, i32 %a, i32 1
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%dim31 = insertelement <4 x i32> %dim30, i32 %a, i32 2
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%dim32 = insertelement <4 x i32> %dim31, i32 %a, i32 3
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%offset_ptr = getelementptr <4 x float>, <4 x float>* null, i32 1
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%offset_int = ptrtoint <4 x float>* %offset_ptr to i64
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%sizeof32 = trunc i64 %offset_int to i32
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%smearinsert33 = insertelement <4 x i32> undef, i32 %sizeof32, i32 0
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%smearinsert34 = insertelement <4 x i32> %smearinsert33, i32 %sizeof32, i32 1
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%smearinsert35 = insertelement <4 x i32> %smearinsert34, i32 %sizeof32, i32 2
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%smearinsert36 = insertelement <4 x i32> %smearinsert35, i32 %sizeof32, i32 3
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%delta_scale = mul <4 x i32> %dim32, %smearinsert36
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%offset_delta = add <4 x i32> zeroinitializer, %delta_scale
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%offset_varying_delta = add <4 x i32> %offset_delta, undef
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ret <4 x float> undef
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}
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define <8 x i32> @pr24458(<8 x float> %n) {
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; CHECK-LABEL: @pr24458(
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; CHECK-NEXT: ret <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
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;
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%notequal_b_load_.i = fcmp une <8 x float> %n, zeroinitializer
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%equal_a_load72_.i = fcmp ueq <8 x float> %n, zeroinitializer
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%notequal_b_load__to_boolvec.i = sext <8 x i1> %notequal_b_load_.i to <8 x i32>
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%equal_a_load72__to_boolvec.i = sext <8 x i1> %equal_a_load72_.i to <8 x i32>
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%wrong = or <8 x i32> %notequal_b_load__to_boolvec.i, %equal_a_load72__to_boolvec.i
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ret <8 x i32> %wrong
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}
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