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be23ce9dba
Summary: The 'R' constraint is actually supposed to be much more complicated than this and is defined in terms of whether it will cause macro expansion in the assembler. 'R' is getting less useful due to architecture changes and ought to be replaced by other constraints. We therefore implement 9-bit offsets which will work for all subtargets and all instructions. Reviewers: vkalintiris Reviewed By: vkalintiris Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8440 llvm-svn: 233537
56 lines
1.5 KiB
LLVM
56 lines
1.5 KiB
LLVM
; RUN: llc -march=mipsel < %s | FileCheck %s
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define i32 @main() nounwind {
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entry:
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; First I with short
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; CHECK: #APP
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; CHECK: addiu ${{[0-9]+}},${{[0-9]+}},4096
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; CHECK: #NO_APP
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tail call i16 asm sideeffect "addiu $0,$1,$2", "=r,r,I"(i16 7, i16 4096) nounwind
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; Then I with int
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; CHECK: #APP
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; CHECK: addiu ${{[0-9]+}},${{[0-9]+}},-3
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; CHECK: #NO_APP
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tail call i32 asm sideeffect "addiu $0,$1,$2", "=r,r,I"(i32 7, i32 -3) nounwind
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; Now J with 0
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; CHECK: #APP
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; CHECK: addiu ${{[0-9]+}},${{[0-9]+}},0
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; CHECK: #NO_APP
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tail call i32 asm sideeffect "addiu $0,$1,$2\0A\09 ", "=r,r,J"(i32 7, i16 0) nounwind
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; Now K with 64
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; CHECK: #APP
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; CHECK: addu ${{[0-9]+}},${{[0-9]+}},64
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; CHECK: #NO_APP
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tail call i16 asm sideeffect "addu $0,$1,$2\0A\09 ", "=r,r,K"(i16 7, i16 64) nounwind
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; Now L with 0x00100000
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; CHECK: #APP
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; CHECK: add ${{[0-9]+}},${{[0-9]+}},${{[0-9]+}}
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; CHECK: #NO_APP
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tail call i32 asm sideeffect "add $0,$1,$3\0A\09", "=r,r,L,r"(i32 7, i32 1048576, i32 0) nounwind
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; Now N with -3
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; CHECK: #APP
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; CHECK: addiu ${{[0-9]+}},${{[0-9]+}},-3
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; CHECK: #NO_APP
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tail call i32 asm sideeffect "addiu $0,$1,$2", "=r,r,N"(i32 7, i32 -3) nounwind
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; Now O with -3
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; CHECK: #APP
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; CHECK: addiu ${{[0-9]+}},${{[0-9]+}},-3
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; CHECK: #NO_APP
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tail call i32 asm sideeffect "addiu $0,$1,$2", "=r,r,O"(i32 7, i16 -3) nounwind
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; Now P with 65535
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; CHECK: #APP
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; CHECK: addiu ${{[0-9]+}},${{[0-9]+}},65535
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; CHECK: #NO_APP
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tail call i32 asm sideeffect "addiu $0,$1,$2", "=r,r,P"(i32 7, i32 65535) nounwind
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ret i32 0
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}
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