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db4396f62a
This change introduces a new IR intrinsic named `llvm.pseudoprobe` for pseudo-probe block instrumentation. Please refer to https://reviews.llvm.org/D86193 for the whole story. A pseudo probe is used to collect the execution count of the block where the probe is instrumented. This requires a pseudo probe to be persisting. The LLVM PGO instrumentation also instruments in similar places by placing a counter in the form of atomic read/write operations or runtime helper calls. While these operations are very persisting or optimization-resilient, in theory we can borrow the atomic read/write implementation from PGO counters and cut it off at the end of compilation with all the atomics converted into binary data. This was our initial design and we’ve seen promising sample correlation quality with it. However, the atomics approach has a couple issues: 1. IR Optimizations are blocked unexpectedly. Those atomic instructions are not going to be physically present in the binary code, but since they are on the IR till very end of compilation, they can still prevent certain IR optimizations and result in lower code quality. 2. The counter atomics may not be fully cleaned up from the code stream eventually. 3. Extra work is needed for re-targeting. We choose to implement pseudo probes based on a special LLVM intrinsic, which is expected to have most of the semantics that comes with an atomic operation but does not block desired optimizations as much as possible. More specifically the semantics associated with the new intrinsic enforces a pseudo probe to be virtually executed exactly the same number of times before and after an IR optimization. The intrinsic also comes with certain flags that are carefully chosen so that the places they are probing are not going to be messed up by the optimizer while most of the IR optimizations still work. The core flags given to the special intrinsic is `IntrInaccessibleMemOnly`, which means the intrinsic accesses memory and does have a side effect so that it is not removable, but is does not access memory locations that are accessible by any original instructions. This way the intrinsic does not alias with any original instruction and thus it does not block optimizations as much as an atomic operation does. We also assign a function GUID and a block index to an intrinsic so that they are uniquely identified and not merged in order to achieve good correlation quality. Let's now look at an example. Given the following LLVM IR: ``` define internal void @foo2(i32 %x, void (i32)* %f) !dbg !4 { bb0: %cmp = icmp eq i32 %x, 0 br i1 %cmp, label %bb1, label %bb2 bb1: br label %bb3 bb2: br label %bb3 bb3: ret void } ``` The instrumented IR will look like below. Note that each `llvm.pseudoprobe` intrinsic call represents a pseudo probe at a block, of which the first parameter is the GUID of the probe’s owner function and the second parameter is the probe’s ID. ``` define internal void @foo2(i32 %x, void (i32)* %f) !dbg !4 { bb0: %cmp = icmp eq i32 %x, 0 call void @llvm.pseudoprobe(i64 837061429793323041, i64 1) br i1 %cmp, label %bb1, label %bb2 bb1: call void @llvm.pseudoprobe(i64 837061429793323041, i64 2) br label %bb3 bb2: call void @llvm.pseudoprobe(i64 837061429793323041, i64 3) br label %bb3 bb3: call void @llvm.pseudoprobe(i64 837061429793323041, i64 4) ret void } ``` Reviewed By: wmi Differential Revision: https://reviews.llvm.org/D86490
784 lines
27 KiB
C++
784 lines
27 KiB
C++
//===-- Instruction.cpp - Implement the Instruction class -----------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the Instruction class for the IR library.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/IR/Instruction.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/ADT/DenseSet.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/MDBuilder.h"
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#include "llvm/IR/Operator.h"
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#include "llvm/IR/Type.h"
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using namespace llvm;
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Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps,
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Instruction *InsertBefore)
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: User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) {
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// If requested, insert this instruction into a basic block...
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if (InsertBefore) {
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BasicBlock *BB = InsertBefore->getParent();
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assert(BB && "Instruction to insert before is not in a basic block!");
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BB->getInstList().insert(InsertBefore->getIterator(), this);
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}
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}
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Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps,
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BasicBlock *InsertAtEnd)
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: User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) {
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// append this instruction into the basic block
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assert(InsertAtEnd && "Basic block to append to may not be NULL!");
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InsertAtEnd->getInstList().push_back(this);
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}
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Instruction::~Instruction() {
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assert(!Parent && "Instruction still linked in the program!");
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// Replace any extant metadata uses of this instruction with undef to
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// preserve debug info accuracy. Some alternatives include:
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// - Treat Instruction like any other Value, and point its extant metadata
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// uses to an empty ValueAsMetadata node. This makes extant dbg.value uses
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// trivially dead (i.e. fair game for deletion in many passes), leading to
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// stale dbg.values being in effect for too long.
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// - Call salvageDebugInfoOrMarkUndef. Not needed to make instruction removal
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// correct. OTOH results in wasted work in some common cases (e.g. when all
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// instructions in a BasicBlock are deleted).
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if (isUsedByMetadata())
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ValueAsMetadata::handleRAUW(this, UndefValue::get(getType()));
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}
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void Instruction::setParent(BasicBlock *P) {
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Parent = P;
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}
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const Module *Instruction::getModule() const {
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return getParent()->getModule();
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}
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const Function *Instruction::getFunction() const {
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return getParent()->getParent();
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}
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void Instruction::removeFromParent() {
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getParent()->getInstList().remove(getIterator());
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}
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iplist<Instruction>::iterator Instruction::eraseFromParent() {
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return getParent()->getInstList().erase(getIterator());
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}
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/// Insert an unlinked instruction into a basic block immediately before the
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/// specified instruction.
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void Instruction::insertBefore(Instruction *InsertPos) {
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InsertPos->getParent()->getInstList().insert(InsertPos->getIterator(), this);
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}
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/// Insert an unlinked instruction into a basic block immediately after the
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/// specified instruction.
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void Instruction::insertAfter(Instruction *InsertPos) {
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InsertPos->getParent()->getInstList().insertAfter(InsertPos->getIterator(),
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this);
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}
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/// Unlink this instruction from its current basic block and insert it into the
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/// basic block that MovePos lives in, right before MovePos.
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void Instruction::moveBefore(Instruction *MovePos) {
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moveBefore(*MovePos->getParent(), MovePos->getIterator());
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}
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void Instruction::moveAfter(Instruction *MovePos) {
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moveBefore(*MovePos->getParent(), ++MovePos->getIterator());
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}
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void Instruction::moveBefore(BasicBlock &BB,
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SymbolTableList<Instruction>::iterator I) {
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assert(I == BB.end() || I->getParent() == &BB);
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BB.getInstList().splice(I, getParent()->getInstList(), getIterator());
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}
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bool Instruction::comesBefore(const Instruction *Other) const {
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assert(Parent && Other->Parent &&
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"instructions without BB parents have no order");
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assert(Parent == Other->Parent && "cross-BB instruction order comparison");
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if (!Parent->isInstrOrderValid())
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Parent->renumberInstructions();
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return Order < Other->Order;
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}
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void Instruction::setHasNoUnsignedWrap(bool b) {
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cast<OverflowingBinaryOperator>(this)->setHasNoUnsignedWrap(b);
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}
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void Instruction::setHasNoSignedWrap(bool b) {
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cast<OverflowingBinaryOperator>(this)->setHasNoSignedWrap(b);
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}
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void Instruction::setIsExact(bool b) {
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cast<PossiblyExactOperator>(this)->setIsExact(b);
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}
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bool Instruction::hasNoUnsignedWrap() const {
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return cast<OverflowingBinaryOperator>(this)->hasNoUnsignedWrap();
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}
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bool Instruction::hasNoSignedWrap() const {
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return cast<OverflowingBinaryOperator>(this)->hasNoSignedWrap();
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}
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void Instruction::dropPoisonGeneratingFlags() {
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switch (getOpcode()) {
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case Instruction::Add:
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case Instruction::Sub:
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case Instruction::Mul:
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case Instruction::Shl:
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cast<OverflowingBinaryOperator>(this)->setHasNoUnsignedWrap(false);
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cast<OverflowingBinaryOperator>(this)->setHasNoSignedWrap(false);
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break;
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case Instruction::UDiv:
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case Instruction::SDiv:
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case Instruction::AShr:
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case Instruction::LShr:
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cast<PossiblyExactOperator>(this)->setIsExact(false);
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break;
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case Instruction::GetElementPtr:
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cast<GetElementPtrInst>(this)->setIsInBounds(false);
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break;
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}
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// TODO: FastMathFlags!
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}
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bool Instruction::isExact() const {
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return cast<PossiblyExactOperator>(this)->isExact();
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}
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void Instruction::setFast(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setFast(B);
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}
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void Instruction::setHasAllowReassoc(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasAllowReassoc(B);
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}
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void Instruction::setHasNoNaNs(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasNoNaNs(B);
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}
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void Instruction::setHasNoInfs(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasNoInfs(B);
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}
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void Instruction::setHasNoSignedZeros(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasNoSignedZeros(B);
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}
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void Instruction::setHasAllowReciprocal(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasAllowReciprocal(B);
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}
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void Instruction::setHasAllowContract(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasAllowContract(B);
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}
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void Instruction::setHasApproxFunc(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasApproxFunc(B);
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}
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void Instruction::setFastMathFlags(FastMathFlags FMF) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setFastMathFlags(FMF);
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}
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void Instruction::copyFastMathFlags(FastMathFlags FMF) {
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assert(isa<FPMathOperator>(this) && "copying fast-math flag on invalid op");
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cast<FPMathOperator>(this)->copyFastMathFlags(FMF);
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}
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bool Instruction::isFast() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->isFast();
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}
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bool Instruction::hasAllowReassoc() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasAllowReassoc();
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}
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bool Instruction::hasNoNaNs() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasNoNaNs();
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}
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bool Instruction::hasNoInfs() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasNoInfs();
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}
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bool Instruction::hasNoSignedZeros() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasNoSignedZeros();
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}
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bool Instruction::hasAllowReciprocal() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasAllowReciprocal();
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}
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bool Instruction::hasAllowContract() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasAllowContract();
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}
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bool Instruction::hasApproxFunc() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasApproxFunc();
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}
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FastMathFlags Instruction::getFastMathFlags() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->getFastMathFlags();
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}
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void Instruction::copyFastMathFlags(const Instruction *I) {
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copyFastMathFlags(I->getFastMathFlags());
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}
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void Instruction::copyIRFlags(const Value *V, bool IncludeWrapFlags) {
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// Copy the wrapping flags.
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if (IncludeWrapFlags && isa<OverflowingBinaryOperator>(this)) {
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if (auto *OB = dyn_cast<OverflowingBinaryOperator>(V)) {
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setHasNoSignedWrap(OB->hasNoSignedWrap());
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setHasNoUnsignedWrap(OB->hasNoUnsignedWrap());
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}
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}
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// Copy the exact flag.
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if (auto *PE = dyn_cast<PossiblyExactOperator>(V))
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if (isa<PossiblyExactOperator>(this))
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setIsExact(PE->isExact());
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// Copy the fast-math flags.
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if (auto *FP = dyn_cast<FPMathOperator>(V))
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if (isa<FPMathOperator>(this))
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copyFastMathFlags(FP->getFastMathFlags());
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if (auto *SrcGEP = dyn_cast<GetElementPtrInst>(V))
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if (auto *DestGEP = dyn_cast<GetElementPtrInst>(this))
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DestGEP->setIsInBounds(SrcGEP->isInBounds() | DestGEP->isInBounds());
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}
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void Instruction::andIRFlags(const Value *V) {
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if (auto *OB = dyn_cast<OverflowingBinaryOperator>(V)) {
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if (isa<OverflowingBinaryOperator>(this)) {
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setHasNoSignedWrap(hasNoSignedWrap() & OB->hasNoSignedWrap());
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setHasNoUnsignedWrap(hasNoUnsignedWrap() & OB->hasNoUnsignedWrap());
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}
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}
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if (auto *PE = dyn_cast<PossiblyExactOperator>(V))
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if (isa<PossiblyExactOperator>(this))
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setIsExact(isExact() & PE->isExact());
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if (auto *FP = dyn_cast<FPMathOperator>(V)) {
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if (isa<FPMathOperator>(this)) {
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FastMathFlags FM = getFastMathFlags();
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FM &= FP->getFastMathFlags();
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copyFastMathFlags(FM);
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}
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}
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if (auto *SrcGEP = dyn_cast<GetElementPtrInst>(V))
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if (auto *DestGEP = dyn_cast<GetElementPtrInst>(this))
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DestGEP->setIsInBounds(SrcGEP->isInBounds() & DestGEP->isInBounds());
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}
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const char *Instruction::getOpcodeName(unsigned OpCode) {
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switch (OpCode) {
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// Terminators
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case Ret: return "ret";
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case Br: return "br";
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case Switch: return "switch";
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case IndirectBr: return "indirectbr";
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case Invoke: return "invoke";
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case Resume: return "resume";
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case Unreachable: return "unreachable";
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case CleanupRet: return "cleanupret";
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case CatchRet: return "catchret";
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case CatchPad: return "catchpad";
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case CatchSwitch: return "catchswitch";
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case CallBr: return "callbr";
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// Standard unary operators...
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case FNeg: return "fneg";
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// Standard binary operators...
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case Add: return "add";
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case FAdd: return "fadd";
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case Sub: return "sub";
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case FSub: return "fsub";
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case Mul: return "mul";
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case FMul: return "fmul";
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case UDiv: return "udiv";
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case SDiv: return "sdiv";
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case FDiv: return "fdiv";
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case URem: return "urem";
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case SRem: return "srem";
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case FRem: return "frem";
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// Logical operators...
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case And: return "and";
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case Or : return "or";
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case Xor: return "xor";
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// Memory instructions...
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case Alloca: return "alloca";
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case Load: return "load";
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case Store: return "store";
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case AtomicCmpXchg: return "cmpxchg";
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case AtomicRMW: return "atomicrmw";
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case Fence: return "fence";
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case GetElementPtr: return "getelementptr";
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// Convert instructions...
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case Trunc: return "trunc";
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case ZExt: return "zext";
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case SExt: return "sext";
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case FPTrunc: return "fptrunc";
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case FPExt: return "fpext";
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case FPToUI: return "fptoui";
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case FPToSI: return "fptosi";
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case UIToFP: return "uitofp";
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case SIToFP: return "sitofp";
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case IntToPtr: return "inttoptr";
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case PtrToInt: return "ptrtoint";
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case BitCast: return "bitcast";
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case AddrSpaceCast: return "addrspacecast";
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// Other instructions...
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case ICmp: return "icmp";
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case FCmp: return "fcmp";
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case PHI: return "phi";
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case Select: return "select";
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case Call: return "call";
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case Shl: return "shl";
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case LShr: return "lshr";
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case AShr: return "ashr";
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case VAArg: return "va_arg";
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case ExtractElement: return "extractelement";
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case InsertElement: return "insertelement";
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case ShuffleVector: return "shufflevector";
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case ExtractValue: return "extractvalue";
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case InsertValue: return "insertvalue";
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case LandingPad: return "landingpad";
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case CleanupPad: return "cleanuppad";
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case Freeze: return "freeze";
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default: return "<Invalid operator> ";
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}
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}
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/// Return true if both instructions have the same special state. This must be
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/// kept in sync with FunctionComparator::cmpOperations in
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/// lib/Transforms/IPO/MergeFunctions.cpp.
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static bool haveSameSpecialState(const Instruction *I1, const Instruction *I2,
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bool IgnoreAlignment = false) {
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assert(I1->getOpcode() == I2->getOpcode() &&
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"Can not compare special state of different instructions");
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if (const AllocaInst *AI = dyn_cast<AllocaInst>(I1))
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return AI->getAllocatedType() == cast<AllocaInst>(I2)->getAllocatedType() &&
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(AI->getAlignment() == cast<AllocaInst>(I2)->getAlignment() ||
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IgnoreAlignment);
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if (const LoadInst *LI = dyn_cast<LoadInst>(I1))
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return LI->isVolatile() == cast<LoadInst>(I2)->isVolatile() &&
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(LI->getAlignment() == cast<LoadInst>(I2)->getAlignment() ||
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IgnoreAlignment) &&
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LI->getOrdering() == cast<LoadInst>(I2)->getOrdering() &&
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LI->getSyncScopeID() == cast<LoadInst>(I2)->getSyncScopeID();
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if (const StoreInst *SI = dyn_cast<StoreInst>(I1))
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return SI->isVolatile() == cast<StoreInst>(I2)->isVolatile() &&
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(SI->getAlignment() == cast<StoreInst>(I2)->getAlignment() ||
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IgnoreAlignment) &&
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SI->getOrdering() == cast<StoreInst>(I2)->getOrdering() &&
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SI->getSyncScopeID() == cast<StoreInst>(I2)->getSyncScopeID();
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if (const CmpInst *CI = dyn_cast<CmpInst>(I1))
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return CI->getPredicate() == cast<CmpInst>(I2)->getPredicate();
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if (const CallInst *CI = dyn_cast<CallInst>(I1))
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return CI->isTailCall() == cast<CallInst>(I2)->isTailCall() &&
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CI->getCallingConv() == cast<CallInst>(I2)->getCallingConv() &&
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|
CI->getAttributes() == cast<CallInst>(I2)->getAttributes() &&
|
|
CI->hasIdenticalOperandBundleSchema(*cast<CallInst>(I2));
|
|
if (const InvokeInst *CI = dyn_cast<InvokeInst>(I1))
|
|
return CI->getCallingConv() == cast<InvokeInst>(I2)->getCallingConv() &&
|
|
CI->getAttributes() == cast<InvokeInst>(I2)->getAttributes() &&
|
|
CI->hasIdenticalOperandBundleSchema(*cast<InvokeInst>(I2));
|
|
if (const CallBrInst *CI = dyn_cast<CallBrInst>(I1))
|
|
return CI->getCallingConv() == cast<CallBrInst>(I2)->getCallingConv() &&
|
|
CI->getAttributes() == cast<CallBrInst>(I2)->getAttributes() &&
|
|
CI->hasIdenticalOperandBundleSchema(*cast<CallBrInst>(I2));
|
|
if (const InsertValueInst *IVI = dyn_cast<InsertValueInst>(I1))
|
|
return IVI->getIndices() == cast<InsertValueInst>(I2)->getIndices();
|
|
if (const ExtractValueInst *EVI = dyn_cast<ExtractValueInst>(I1))
|
|
return EVI->getIndices() == cast<ExtractValueInst>(I2)->getIndices();
|
|
if (const FenceInst *FI = dyn_cast<FenceInst>(I1))
|
|
return FI->getOrdering() == cast<FenceInst>(I2)->getOrdering() &&
|
|
FI->getSyncScopeID() == cast<FenceInst>(I2)->getSyncScopeID();
|
|
if (const AtomicCmpXchgInst *CXI = dyn_cast<AtomicCmpXchgInst>(I1))
|
|
return CXI->isVolatile() == cast<AtomicCmpXchgInst>(I2)->isVolatile() &&
|
|
CXI->isWeak() == cast<AtomicCmpXchgInst>(I2)->isWeak() &&
|
|
CXI->getSuccessOrdering() ==
|
|
cast<AtomicCmpXchgInst>(I2)->getSuccessOrdering() &&
|
|
CXI->getFailureOrdering() ==
|
|
cast<AtomicCmpXchgInst>(I2)->getFailureOrdering() &&
|
|
CXI->getSyncScopeID() ==
|
|
cast<AtomicCmpXchgInst>(I2)->getSyncScopeID();
|
|
if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(I1))
|
|
return RMWI->getOperation() == cast<AtomicRMWInst>(I2)->getOperation() &&
|
|
RMWI->isVolatile() == cast<AtomicRMWInst>(I2)->isVolatile() &&
|
|
RMWI->getOrdering() == cast<AtomicRMWInst>(I2)->getOrdering() &&
|
|
RMWI->getSyncScopeID() == cast<AtomicRMWInst>(I2)->getSyncScopeID();
|
|
if (const ShuffleVectorInst *SVI = dyn_cast<ShuffleVectorInst>(I1))
|
|
return SVI->getShuffleMask() ==
|
|
cast<ShuffleVectorInst>(I2)->getShuffleMask();
|
|
|
|
return true;
|
|
}
|
|
|
|
bool Instruction::isIdenticalTo(const Instruction *I) const {
|
|
return isIdenticalToWhenDefined(I) &&
|
|
SubclassOptionalData == I->SubclassOptionalData;
|
|
}
|
|
|
|
bool Instruction::isIdenticalToWhenDefined(const Instruction *I) const {
|
|
if (getOpcode() != I->getOpcode() ||
|
|
getNumOperands() != I->getNumOperands() ||
|
|
getType() != I->getType())
|
|
return false;
|
|
|
|
// If both instructions have no operands, they are identical.
|
|
if (getNumOperands() == 0 && I->getNumOperands() == 0)
|
|
return haveSameSpecialState(this, I);
|
|
|
|
// We have two instructions of identical opcode and #operands. Check to see
|
|
// if all operands are the same.
|
|
if (!std::equal(op_begin(), op_end(), I->op_begin()))
|
|
return false;
|
|
|
|
// WARNING: this logic must be kept in sync with EliminateDuplicatePHINodes()!
|
|
if (const PHINode *thisPHI = dyn_cast<PHINode>(this)) {
|
|
const PHINode *otherPHI = cast<PHINode>(I);
|
|
return std::equal(thisPHI->block_begin(), thisPHI->block_end(),
|
|
otherPHI->block_begin());
|
|
}
|
|
|
|
return haveSameSpecialState(this, I);
|
|
}
|
|
|
|
// Keep this in sync with FunctionComparator::cmpOperations in
|
|
// lib/Transforms/IPO/MergeFunctions.cpp.
|
|
bool Instruction::isSameOperationAs(const Instruction *I,
|
|
unsigned flags) const {
|
|
bool IgnoreAlignment = flags & CompareIgnoringAlignment;
|
|
bool UseScalarTypes = flags & CompareUsingScalarTypes;
|
|
|
|
if (getOpcode() != I->getOpcode() ||
|
|
getNumOperands() != I->getNumOperands() ||
|
|
(UseScalarTypes ?
|
|
getType()->getScalarType() != I->getType()->getScalarType() :
|
|
getType() != I->getType()))
|
|
return false;
|
|
|
|
// We have two instructions of identical opcode and #operands. Check to see
|
|
// if all operands are the same type
|
|
for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
|
|
if (UseScalarTypes ?
|
|
getOperand(i)->getType()->getScalarType() !=
|
|
I->getOperand(i)->getType()->getScalarType() :
|
|
getOperand(i)->getType() != I->getOperand(i)->getType())
|
|
return false;
|
|
|
|
return haveSameSpecialState(this, I, IgnoreAlignment);
|
|
}
|
|
|
|
bool Instruction::isUsedOutsideOfBlock(const BasicBlock *BB) const {
|
|
for (const Use &U : uses()) {
|
|
// PHI nodes uses values in the corresponding predecessor block. For other
|
|
// instructions, just check to see whether the parent of the use matches up.
|
|
const Instruction *I = cast<Instruction>(U.getUser());
|
|
const PHINode *PN = dyn_cast<PHINode>(I);
|
|
if (!PN) {
|
|
if (I->getParent() != BB)
|
|
return true;
|
|
continue;
|
|
}
|
|
|
|
if (PN->getIncomingBlock(U) != BB)
|
|
return true;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
bool Instruction::mayReadFromMemory() const {
|
|
switch (getOpcode()) {
|
|
default: return false;
|
|
case Instruction::VAArg:
|
|
case Instruction::Load:
|
|
case Instruction::Fence: // FIXME: refine definition of mayReadFromMemory
|
|
case Instruction::AtomicCmpXchg:
|
|
case Instruction::AtomicRMW:
|
|
case Instruction::CatchPad:
|
|
case Instruction::CatchRet:
|
|
return true;
|
|
case Instruction::Call:
|
|
case Instruction::Invoke:
|
|
case Instruction::CallBr:
|
|
return !cast<CallBase>(this)->doesNotReadMemory();
|
|
case Instruction::Store:
|
|
return !cast<StoreInst>(this)->isUnordered();
|
|
}
|
|
}
|
|
|
|
bool Instruction::mayWriteToMemory() const {
|
|
switch (getOpcode()) {
|
|
default: return false;
|
|
case Instruction::Fence: // FIXME: refine definition of mayWriteToMemory
|
|
case Instruction::Store:
|
|
case Instruction::VAArg:
|
|
case Instruction::AtomicCmpXchg:
|
|
case Instruction::AtomicRMW:
|
|
case Instruction::CatchPad:
|
|
case Instruction::CatchRet:
|
|
return true;
|
|
case Instruction::Call:
|
|
case Instruction::Invoke:
|
|
case Instruction::CallBr:
|
|
return !cast<CallBase>(this)->onlyReadsMemory();
|
|
case Instruction::Load:
|
|
return !cast<LoadInst>(this)->isUnordered();
|
|
}
|
|
}
|
|
|
|
bool Instruction::isAtomic() const {
|
|
switch (getOpcode()) {
|
|
default:
|
|
return false;
|
|
case Instruction::AtomicCmpXchg:
|
|
case Instruction::AtomicRMW:
|
|
case Instruction::Fence:
|
|
return true;
|
|
case Instruction::Load:
|
|
return cast<LoadInst>(this)->getOrdering() != AtomicOrdering::NotAtomic;
|
|
case Instruction::Store:
|
|
return cast<StoreInst>(this)->getOrdering() != AtomicOrdering::NotAtomic;
|
|
}
|
|
}
|
|
|
|
bool Instruction::hasAtomicLoad() const {
|
|
assert(isAtomic());
|
|
switch (getOpcode()) {
|
|
default:
|
|
return false;
|
|
case Instruction::AtomicCmpXchg:
|
|
case Instruction::AtomicRMW:
|
|
case Instruction::Load:
|
|
return true;
|
|
}
|
|
}
|
|
|
|
bool Instruction::hasAtomicStore() const {
|
|
assert(isAtomic());
|
|
switch (getOpcode()) {
|
|
default:
|
|
return false;
|
|
case Instruction::AtomicCmpXchg:
|
|
case Instruction::AtomicRMW:
|
|
case Instruction::Store:
|
|
return true;
|
|
}
|
|
}
|
|
|
|
bool Instruction::mayThrow() const {
|
|
if (const CallInst *CI = dyn_cast<CallInst>(this))
|
|
return !CI->doesNotThrow();
|
|
if (const auto *CRI = dyn_cast<CleanupReturnInst>(this))
|
|
return CRI->unwindsToCaller();
|
|
if (const auto *CatchSwitch = dyn_cast<CatchSwitchInst>(this))
|
|
return CatchSwitch->unwindsToCaller();
|
|
return isa<ResumeInst>(this);
|
|
}
|
|
|
|
bool Instruction::isSafeToRemove() const {
|
|
return (!isa<CallInst>(this) || !this->mayHaveSideEffects()) &&
|
|
!this->isTerminator();
|
|
}
|
|
|
|
bool Instruction::isLifetimeStartOrEnd() const {
|
|
auto II = dyn_cast<IntrinsicInst>(this);
|
|
if (!II)
|
|
return false;
|
|
Intrinsic::ID ID = II->getIntrinsicID();
|
|
return ID == Intrinsic::lifetime_start || ID == Intrinsic::lifetime_end;
|
|
}
|
|
|
|
const Instruction *
|
|
Instruction::getNextNonDebugInstruction(bool SkipPseudoOp) const {
|
|
for (const Instruction *I = getNextNode(); I; I = I->getNextNode())
|
|
if (!isa<DbgInfoIntrinsic>(I) && !(SkipPseudoOp && isa<PseudoProbeInst>(I)))
|
|
return I;
|
|
return nullptr;
|
|
}
|
|
|
|
const Instruction *
|
|
Instruction::getPrevNonDebugInstruction(bool SkipPseudoOp) const {
|
|
for (const Instruction *I = getPrevNode(); I; I = I->getPrevNode())
|
|
if (!isa<DbgInfoIntrinsic>(I) && !(SkipPseudoOp && isa<PseudoProbeInst>(I)))
|
|
return I;
|
|
return nullptr;
|
|
}
|
|
|
|
bool Instruction::isAssociative() const {
|
|
unsigned Opcode = getOpcode();
|
|
if (isAssociative(Opcode))
|
|
return true;
|
|
|
|
switch (Opcode) {
|
|
case FMul:
|
|
case FAdd:
|
|
return cast<FPMathOperator>(this)->hasAllowReassoc() &&
|
|
cast<FPMathOperator>(this)->hasNoSignedZeros();
|
|
default:
|
|
return false;
|
|
}
|
|
}
|
|
|
|
bool Instruction::isCommutative() const {
|
|
if (auto *II = dyn_cast<IntrinsicInst>(this))
|
|
return II->isCommutative();
|
|
// TODO: Should allow icmp/fcmp?
|
|
return isCommutative(getOpcode());
|
|
}
|
|
|
|
unsigned Instruction::getNumSuccessors() const {
|
|
switch (getOpcode()) {
|
|
#define HANDLE_TERM_INST(N, OPC, CLASS) \
|
|
case Instruction::OPC: \
|
|
return static_cast<const CLASS *>(this)->getNumSuccessors();
|
|
#include "llvm/IR/Instruction.def"
|
|
default:
|
|
break;
|
|
}
|
|
llvm_unreachable("not a terminator");
|
|
}
|
|
|
|
BasicBlock *Instruction::getSuccessor(unsigned idx) const {
|
|
switch (getOpcode()) {
|
|
#define HANDLE_TERM_INST(N, OPC, CLASS) \
|
|
case Instruction::OPC: \
|
|
return static_cast<const CLASS *>(this)->getSuccessor(idx);
|
|
#include "llvm/IR/Instruction.def"
|
|
default:
|
|
break;
|
|
}
|
|
llvm_unreachable("not a terminator");
|
|
}
|
|
|
|
void Instruction::setSuccessor(unsigned idx, BasicBlock *B) {
|
|
switch (getOpcode()) {
|
|
#define HANDLE_TERM_INST(N, OPC, CLASS) \
|
|
case Instruction::OPC: \
|
|
return static_cast<CLASS *>(this)->setSuccessor(idx, B);
|
|
#include "llvm/IR/Instruction.def"
|
|
default:
|
|
break;
|
|
}
|
|
llvm_unreachable("not a terminator");
|
|
}
|
|
|
|
void Instruction::replaceSuccessorWith(BasicBlock *OldBB, BasicBlock *NewBB) {
|
|
for (unsigned Idx = 0, NumSuccessors = Instruction::getNumSuccessors();
|
|
Idx != NumSuccessors; ++Idx)
|
|
if (getSuccessor(Idx) == OldBB)
|
|
setSuccessor(Idx, NewBB);
|
|
}
|
|
|
|
Instruction *Instruction::cloneImpl() const {
|
|
llvm_unreachable("Subclass of Instruction failed to implement cloneImpl");
|
|
}
|
|
|
|
void Instruction::swapProfMetadata() {
|
|
MDNode *ProfileData = getMetadata(LLVMContext::MD_prof);
|
|
if (!ProfileData || ProfileData->getNumOperands() != 3 ||
|
|
!isa<MDString>(ProfileData->getOperand(0)))
|
|
return;
|
|
|
|
MDString *MDName = cast<MDString>(ProfileData->getOperand(0));
|
|
if (MDName->getString() != "branch_weights")
|
|
return;
|
|
|
|
// The first operand is the name. Fetch them backwards and build a new one.
|
|
Metadata *Ops[] = {ProfileData->getOperand(0), ProfileData->getOperand(2),
|
|
ProfileData->getOperand(1)};
|
|
setMetadata(LLVMContext::MD_prof,
|
|
MDNode::get(ProfileData->getContext(), Ops));
|
|
}
|
|
|
|
void Instruction::copyMetadata(const Instruction &SrcInst,
|
|
ArrayRef<unsigned> WL) {
|
|
if (!SrcInst.hasMetadata())
|
|
return;
|
|
|
|
DenseSet<unsigned> WLS;
|
|
for (unsigned M : WL)
|
|
WLS.insert(M);
|
|
|
|
// Otherwise, enumerate and copy over metadata from the old instruction to the
|
|
// new one.
|
|
SmallVector<std::pair<unsigned, MDNode *>, 4> TheMDs;
|
|
SrcInst.getAllMetadataOtherThanDebugLoc(TheMDs);
|
|
for (const auto &MD : TheMDs) {
|
|
if (WL.empty() || WLS.count(MD.first))
|
|
setMetadata(MD.first, MD.second);
|
|
}
|
|
if (WL.empty() || WLS.count(LLVMContext::MD_dbg))
|
|
setDebugLoc(SrcInst.getDebugLoc());
|
|
}
|
|
|
|
Instruction *Instruction::clone() const {
|
|
Instruction *New = nullptr;
|
|
switch (getOpcode()) {
|
|
default:
|
|
llvm_unreachable("Unhandled Opcode.");
|
|
#define HANDLE_INST(num, opc, clas) \
|
|
case Instruction::opc: \
|
|
New = cast<clas>(this)->cloneImpl(); \
|
|
break;
|
|
#include "llvm/IR/Instruction.def"
|
|
#undef HANDLE_INST
|
|
}
|
|
|
|
New->SubclassOptionalData = SubclassOptionalData;
|
|
New->copyMetadata(*this);
|
|
return New;
|
|
}
|