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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-30 23:42:52 +01:00
llvm-mirror/test/CodeGen
Hal Finkel c45bfe85cc Revert r190764: PPC: Don't restrict lvsl generation to after type legalization
This is causing test-suite failures.

Original commit message:

The PPC backend uses a target-specific DAG combine to turn unaligned Altivec
loads into a permutation-based sequence when possible. Unfortunately, the
target-specific DAG combine is not always called on all loads of interest
(sometimes the routines in DAGCombine call CombineTo such that the new node and
users are not added to the worklist); allowing the combine to trigger early
(before type legalization) mitigates this problem. Because the autovectorizers
only create legal vector types, I don't expect a lot of cases where this
optimization is enabled by type legalization in practice.

llvm-svn: 190765
2013-09-15 15:41:11 +00:00
..
AArch64 Implement aarch64 neon instruction set AdvSIMD (3V Diff), covering the following 26 instructions, 2013-09-09 02:20:27 +00:00
ARM [ARMv8] Change hasV8Fp to hasFPARMv8, and other command line options 2013-09-13 13:46:57 +00:00
CPP [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
Generic [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
Hexagon Debug Info Testing: use null instead of an empty string in context field. 2013-09-09 00:12:17 +00:00
Inputs Debug Info: add an identifier field to DICompositeType. 2013-08-26 22:39:55 +00:00
Mips Expand the mask capability for deciding which functions are mips16 and mips32 2013-09-15 02:09:08 +00:00
MSP430 [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
NVPTX [NVPTX] Re-enable assembly printing support for inline assembly 2013-08-24 01:17:23 +00:00
PowerPC Revert r190764: PPC: Don't restrict lvsl generation to after type legalization 2013-09-15 15:41:11 +00:00
R600 R600: Move code handling literal folding into R600ISelLowering. 2013-09-12 23:44:53 +00:00
SPARC [Sparc] Correctly handle call to functions with ReturnsTwice attribute. 2013-09-05 05:32:16 +00:00
SystemZ [SystemZ] Try to fold shifts into TMxx 2013-09-13 09:09:50 +00:00
Thumb ARM: Use "dmb sy" for barriers on M-class CPUs 2013-08-28 14:39:19 +00:00
Thumb2 [ARMv8] Prevent generation of deprecated IT blocks on ARMv8 in Thumb mode. 2013-09-09 14:21:49 +00:00
X86 AVX-512: implemented extractelement with variable index. 2013-09-12 08:55:00 +00:00
XCore XCore handling of thread local lowering 2013-09-09 10:42:11 +00:00