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d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
60 lines
1.5 KiB
YAML
60 lines
1.5 KiB
YAML
# RUN: llc -run-pass=peephole-opt %s -o - | FileCheck %s
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# CHECK: [[IN:%.*]]:gprnopc = COPY $r0
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# CHECK: [[SUM1TMP:%.*]]:rgpr = ADDri [[IN]], 133
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# CHECK: [[SUM1:%.*]]:rgpr = ADDri killed [[SUM1TMP]], 25600
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# CHECK: [[SUM2TMP:%.*]]:rgpr = SUBri [[IN]], 133
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# CHECK: [[SUM2:%.*]]:rgpr = SUBri killed [[SUM2TMP]], 25600
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# CHECK: [[SUM3TMP:%.*]]:rgpr = SUBri [[IN]], 133
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# CHECK: [[SUM3:%.*]]:rgpr = SUBri killed [[SUM3TMP]], 25600
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# CHECK: [[SUM4TMP:%.*]]:rgpr = ADDri killed [[IN]], 133
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# CHECK: [[SUM4:%.*]]:rgpr = ADDri killed [[SUM4TMP]], 25600
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--- |
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target datalayout = "e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
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target triple = "armv7-apple-ios"
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define i32 @foo(i32 %in) {
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ret i32 undef
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}
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...
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---
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name: foo
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registers:
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- { id: 0, class: gprnopc }
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- { id: 1, class: rgpr }
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- { id: 2, class: rgpr }
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- { id: 3, class: rgpr }
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- { id: 4, class: rgpr }
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- { id: 5, class: rgpr }
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- { id: 6, class: rgpr }
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- { id: 7, class: rgpr }
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- { id: 8, class: rgpr }
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liveins:
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- { reg: '$r0', virtual-reg: '%0' }
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body: |
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bb.0 (%ir-block.0):
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liveins: $r0
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%0 = COPY $r0
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%1 = MOVi32imm -25733
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%2 = SUBrr %0, killed %1, 14, $noreg, $noreg
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%3 = MOVi32imm 25733
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%4 = SUBrr %0, killed %3, 14, $noreg, $noreg
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%5 = MOVi32imm -25733
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%6 = ADDrr %0, killed %5, 14, $noreg, $noreg
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%7 = MOVi32imm 25733
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%8 = ADDrr killed %0, killed %7, 14, $noreg, $noreg
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$r0 = COPY killed %8
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BX_RET 14, $noreg, implicit $r0
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...
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